EEWORLDEEWORLDEEWORLD

Part Number

Search

590AC100M000DG

Description
Standard Clock Oscillators SINGLE XO 6 PIN 0.5PS RS JTR (NCNR)
CategoryPassive components   
File Size394KB,15 Pages
ManufacturerSilicon Laboratories
Download Datasheet Parametric View All

590AC100M000DG Online Shopping

Suppliers Part Number Price MOQ In stock  
590AC100M000DG - - View Buy Now

590AC100M000DG Overview

Standard Clock Oscillators SINGLE XO 6 PIN 0.5PS RS JTR (NCNR)

590AC100M000DG Parametric

Parameter NameAttribute value
Product CategoryStandard Clock Oscillators
ManufacturerSilicon Laboratories
RoHSDetails
ProductStandard Clock Oscillators
Frequency100 MHz
Frequency Stability20 PPM
Operating Supply Voltage3.3 V
Output FormatLVPECL
Termination StyleSMD/SMT
Package / Case7 mm x 5 mm
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length7 mm
Width5 mm
Height1.65 mm
Mounting StyleSMD/SMT
Factory Pack Quantity1
Unit Weight0.001764 oz
S i 5 9 0 / 5 91
1 ps M
AX
J
I T T E R
C
RYSTAL
O
SC ILLA TOR
(XO)
(10 M H
Z TO
810 MH
Z
)
Features
Available with any-frequency output
frequencies from 10 to 810 MHz
3rd generation DSPLL
®
with superior
jitter performance: 1 ps max jitter
Better frequency stability than SAW-
based oscillators
Internal fundamental mode crystal
ensures high reliability
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry Standard 5x7 and
3.2x5 mm packages
Pb-free/RoHS-compliant
–40 to +85 ºC operating
temperature range
Si5602
Applications
SONET/SDH (OC-3/12/48)
Networking
SD/HD SDI/3G SDI video
Ordering Information:
See page 7.
Test and measurement
Storage
FPGA/ASIC clock generation
Description
The Si590/591 XO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry
to provide a low jitter clock at high frequencies. The Si590/591 supports any
frequency from 10 to 810 MHz. Unlike a traditional XO, where a unique
crystal is required for each output frequency, the Si590/591 uses one fixed
crystal to provide a wide range of output frequencies. This IC based
approach allows the crystal resonator to provide exceptional frequency
stability and reliability. In addition, DSPLL clock synthesis provides superior
supply noise rejection, simplifying the task of generating low jitter clocks in
noisy environments typically found in communication systems. The
Si590/591 IC based XO is factory configurable for a wide variety of user
specifications including frequency, supply voltage, output format, and
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si590 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
NC
CLK
Functional Block Diagram
V
DD
CLK– CLK+
17 k
*
Fixed
Frequency
XO
Si590 (CMOS)
Any-rate
10–810 MHz
DSPLL
®
Clock
Synthesis
V
DD
CLK–
CLK+
OE
OE
NC
GND
1
2
3
6
5
4
17 k
*
GND
*Note: Output Enable High/Low Options Available – See Ordering Information
Si591 (LVDS/LVPECL/CML)
Rev. 1.1 12/17
Copyright © 2017 by Silicon Laboratories
Si590/591
[Keysight Technologies Thanksgiving Month Essay Contest] + Timely Rain DSOX1102G
When I saw the EEWORD article solicitation, I was immediately delighted. Finally, I had something to talk about. Since February 2017, the company was preparing to make a metal distance detection produ...
jplzl10000 Test/Measurement
About the address of IOCON_SCKLOC in LPC1100 routine
When operating the spi function of SSP, I found the following statement in lpc1100.h in the example program. #define IOCON_SCKLOC (*(volatile unsigned long *)(IOCON_BASE + 0x110)) That is to say, the ...
eeleader MCU
STM32G timer setting problem
I used STM32CUBE to develop an experimental program for STM32G431. I felt that the setting was 1K Hz, and the TIM6 clock was very slow. About 50 interrupt cycles, that is, 1S, was 10 times slower. Bec...
bigbat stm32/stm8
AHB Configuration
I want to use AHB mode and GPIO register mapping to turn on the light. Which registers do I need to configure? (I am using arm cortex M3 LM3S9B96) I configured the following, but it does not work. Is ...
jiangsh FPGA/CPLD
I am confused! A newbie encountered a strange problem! Even ordinary loop statements are giving me trouble!
In Keil compilation environment, in main, besides the initialization statement, there is only one loop: unsigned char i; for(i=0;i<10;i++) {Serial_One_SendData(i); } It should loop 10 times, and outpu...
y_s_k0404 Embedded System
Solution for invalid crystal oscillator configuration of M8
Yesterday I helped a friend write something. It was my first time using Zhifeng. I accidentally locked the crystal oscillator of M8 to an external clock, and I couldn't download the program. I was ver...
heicnhei Microchip MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1574  1887  2452  925  171  32  38  50  19  4 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号