PLL0930A datasheet, PDF - EEWORLD Datasheet

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PLL0930A: DescriptionPHASE LOCKED LOOP, 960 MHz, QMA14; Categoryaccessories; File Size74KB，2 Pages; ManufacturerETC

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PLL0930A Overview

PHASE LOCKED LOOP, 960 MHz, QMA14

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PLL0930A

9939 Via Pasar • San Diego, CA 92126

TEL (858) 621-2700 FAX (858) 621-2722

PHASE LOCKED LOOP

Rev A2

PHASE NOISE (1 Hz BW, typical)

FEATURES

• Frequency Range:

900 - 960 MHz

• Step Size:

100 KHz

• PLL - Style Package

APPLICATIONS

• Basestations

• Mobile Radios

• Satellite Communications

PERFORMANCE SPECIFICATIONS

Frequency Range

RMS Phase Error (100 Hz - 100 KHz)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

Power Output

Load Impedance

Step Size

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

Operating Temperature Range

Package Style

VALUE

900

960

0.75

-15

-65

3±2

100

HIGH

-40 to +85

PLL

UNITS

MHz

dBc

dBm

Ω

KHz

mSec

°C

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Supply Current (Icc, typ.)

APPLICATION NOTES

Vdc

All specifications are typical unless otherwise noted and subject to change without notice.

•

AN-107 : How to Solder Z-COMM VCOs / PLLs

•

AN-200 : Mounting and Grounding of Z-COMM PLLs

•

AN-201 : PLL Fundamentals

AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

o s c

<40 MHz

Page 1

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