3 MSPS,10-/12-Bit
ADCs in 8-Lead TSOT
AD7273/AD7274
FEATURES
Throughput rate: 3 MSPS
Specified for V
DD
of 2.35 V to 3.6 V
Power consumption
11.4 mW at 3 MSPS with 3 V supplies
Wide input bandwidth
70 dB SNR at 1 MHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
Temperature range: −40°C to +125°C
Power-down mode: 0.1 μA typ
8-lead TSOT package
8-lead MSOP package
FUNCTIONAL BLOCK DIAGRAM
V
DD
AGND
V
IN
V
REF
T/H
10-/12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SCLK
CONTROL
LOGIC
SDATA
CS
DGND
Figure 1.
GENERAL DESCRIPTION
The AD7273/AD7274 are 10-/12-bit, high speed, low power,
successive approximation ADCs, respectively. The parts operate
from a single 2.35 V to 3.6 V power supply and feature
throughput rates of up to 3 MSPS. Each part contains a low
noise, wide bandwidth track-and-hold amplifier that can handle
input frequencies in excess of 55 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The input signal is sampled on
the falling edge of CS, and the conversion is also initiated at this
point. The conversion rate is determined by the SCLK. There
are no pipeline delays associated with these parts.
The AD7273/AD7274 use advanced design techniques to
achieve very low power dissipation at high throughput rates.
The reference for the parts is applied externally and can be in
the range of 1.4 V to V
DD
. This allows the widest dynamic input
range to the ADC.
Table 1.
Part Number
AD7273
1
AD7274
1
AD7276
AD7277
AD7278
1
Resolution
10
12
12
10
8
Package
8-lead MSOP
8-Lead TSOT
8-lead MSOP
8-Lead TSOT
8-lead MSOP
6-Lead TSOT
8-lead MSOP
6-Lead TSOT
8-lead MSOP
6-Lead TSOT
Parts contain external reference pin.
PRODUCT HIGHLIGHTS
1. 3 MSPS ADCs in an 8-lead TSOT package.
2. High throughput with low power consumption.
3. Flexible power/serial clock speed management.
Allows maximum power efficiency at low throughput rates.
4. Reference can be driven up to the power supply.
5. No pipeline delay.
6. The parts feature a standard successive approximation ADC
with accurate control of the sampling instant via a CS input
and once-off conversion control.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
04973-001
AD7273/AD7274
AD7273/AD7274
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AD7274 Specifications................................................................. 3
AD7273 Specifications................................................................. 5
Timing Specifications .................................................................. 7
Timing Examples.......................................................................... 8
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 14
Circuit Information ........................................................................ 15
Converter Operation.................................................................. 15
ADC Transfer Function............................................................. 15
Typical Connection Diagram ....................................................... 16
Analog Input ............................................................................... 16
Digital Inputs .............................................................................. 16
Modes of Operation ....................................................................... 17
Normal Mode.............................................................................. 17
Partial Power-Down Mode ....................................................... 17
Full Power-Down Mode ............................................................ 17
Power-Up Times......................................................................... 18
Power vs. Throughput Rate....................................................... 20
Serial Interface ................................................................................ 21
Microprocessor Interfacing....................................................... 23
Application Hints ........................................................................... 24
Grounding and Layout .............................................................. 24
Evaluating the AD7273/AD7274 Performance......................... 24
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25
REVISION HISTORY
9/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
AD7273/AD7274
SPECIFICATIONS
AD7274 SPECIFICATIONS
V
DD
= 2.35 V to 3.6 V, V
REF
= 2.35 V to V
DD
, f
SCLK
= 48 MHz, f
SAMPLE
= 3 MSPS, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
3
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
3
Peak Harmonic or Spurious Noise (SFDR)
3
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Power Supply Rejection Ratio (PSRR)
DC ACCURACY
Resolution
Integral Nonlinearity
3
Differential Nonlinearity
3
Offset Error
3
Gain Error
3
Total Unadjusted Error (TUE)
3
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
V
REF
Input Voltage Range
DC leakage Current
Input Capacitance
Input Impedance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN 4
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
4
Output Coding
B Grade
1
68
69.5
−73
−78
−80
−82
−82
5
18
55
8
82
12
±1
±1
±3
±3.5
±3.5
0 to V
REF
±1
±5.5
42
10
1.4 to V
DD
±1
20
32
1.7
2
0.7
0.8
±1
2
Unit
2
dB min
dB min
dB max
dB typ
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
dB typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
V
μA max
μA max
pF typ
pF typ
V min/V max
μA max
pF typ
Ω typ
V min
V min
V max
V max
μA max
pF max
2.35 V ≤ V
DD
≤ 2.7 V
2.7 V < V
DD
≤ 3.6 V
2.35 V ≤ V
DD
< 2.7 V
2.7 V ≤ V
DD
≤ 3.6 V
Typically 10 nA, V
IN
= 0 V or V
DD
fa = 1 MHz, fb = 0.97 MHz
fa = 1 MHz, fb = 0.97 MHz
Test Conditions/Comments
f
IN
= 1 MHz sine wave
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 12 bits
−40°C to +85°C
85°C to 125°C
When in track
When in hold
V
DD
− 0.2
V min
0.2
V max
±2.5
μA max
4.5
pF max
Straight (natural) binary
I
SOURCE
= 200 μA, V
DD
= 2.35 V to 3.6 V
I
SINK
= 200 μA
Rev. 0 | Page 3 of 28
AD7273/AD7274
Parameter
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
3
Throughput Rate
POWER RQUIREMENTS
V
DD
I
DD
Normal Mode (Static)
Normal Mode (Operational)
Partial Power-Down Mode (Static)
Full Power-Down Mode (Static)
Power Dissipation
5
Normal Mode (Operational)
Partial Power-Down
Full Power-Down
1
2
B Grade
1
291
60
3
2.35/3.6
1
5
3.8
34
2
10
18
11.4
102
7.2
Unit
2
ns max
ns max
MSPS max
V min/V max
mA typ
mA max
mA typ
μA typ
μA max
μA max
mW max
mW typ
μW max
μW max
Test Conditions/Comments
14 SCLK cycles with SCLK at 48 MHz
See the Serial Interface section
Digital I/Ps = 0 V or V
DD
V
DD
= 3 V, SCLK on or off
V
DD
= 2.35 V to 3.6 V, f
SAMPLE
= 3 MSPS
V
DD
= 3 V
−40°C to +85°C, typically 0.1 μA
85°C to 125°C
V
DD
= 3.6 V , f
SAMPLE
= 3 MSPS
V
DD
= 3 V
V
DD
= 3 V
V
DD
= 3.6 V, −40°C to +85°C
Temperature range from −40°C to +125°C.
Typical specifications are tested with V
DD
= 3 V and V
REF
= 3 V at 25°C.
3
See the Terminology section.
4
Guaranteed by characterization.
5
See the Power vs. Throughput Rate section.
Rev. 0 | Page 4 of 28
AD7273/AD7274
AD7273 SPECIFICATIONS
V
DD
= 2.35 V to 3.6 V, V
REF
= 2.35 V to V
DD
, f
SCLK
= 48 MHz, f
SAMPLE
= 3 MSPS, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
3
Total Harmonic Distortion (THD)
3
Peak Harmonic or Spurious Noise (SFDR)
3
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
Power Supply Rejection Ratio (PSRR)
DC ACCURACY
Resolution
Integral Nonlinearity
3
Differential Nonlinearity
3
Offset Error
3
Gain Error
3
Total Unadjusted Error (TUE)
3
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
V
REF
Input Voltage Range
DC leakage Current
Input Capacitance
Input Impedance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
IN
Input Current, I
IN
Input Capacitance, C
IN 4
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
4
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
3
Throughput Rate
B Grade
1
61
−72
−77
−80
−81
−81
5
18
74
10
82
10
±0.5
±0.5
±1
±1.5
±2.5
0 to V
REF
±1
±5.5
42
10
1.4 to V
DD
±1
20
32
1.7
2
0.7
0.8
±1
2
Unit
2
dB min
dB max
dB typ
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
dB typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
V
μA max
μA max
pF typ
pF typ
V min/V max
μA max
pF typ
Ω typ
V min
V min
V max
V max
μA max
pF max
2.35 V ≤ V
DD
≤ 2.7 V
2.7 V < V
DD
≤ 3.6 V
2.35 V ≤ V
DD
< 2.7 V
2.7 V ≤ V
DD
≤ 3.6 V
Typically 10 nA, V
IN
= 0 V or V
DD
fa = 1 MHz, fb = 0.97 MHz
fa = 1 MHz, fb = 0.97 MHz
Test Conditions/Comments
f
IN
= 1 MHz sine wave
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 10 bits
−40°C to +85°C
85°C to 125°C
When in track
When in hold
V
DD
− 0.2
V min
0.2
V max
±2.5
μA max
4.5
pF max
Straight (natural) binary
250
60
3.45
ns max
ns max
MSPS max
I
SOURCE
= 200 μA; V
DD
= 2.35 V to 3.6 V
I
SINK
= 200 μA
12 SCLK cycles with SCLK at 48 MHz
See the Serial Interface section
Rev. 0 | Page 5 of 28
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