EEWORLDEEWORLDEEWORLD

Part Number

Search

8T33FS6222EPGI8

Description
Clock Drivers u0026 Distribution LV 1:15 Differential PECL 2GHz Fanout
Categorysemiconductor    Analog mixed-signal IC   
File Size747KB,34 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

8T33FS6222EPGI8 Online Shopping

Suppliers Part Number Price MOQ In stock  
8T33FS6222EPGI8 - - View Buy Now

8T33FS6222EPGI8 Overview

Clock Drivers u0026 Distribution LV 1:15 Differential PECL 2GHz Fanout

8T33FS6222EPGI8 Parametric

Parameter NameAttribute value
Product CategoryClock Drivers & Distribution
ManufacturerIDT (Integrated Device Technology, Inc.)
RoHSDetails
PackagingReel
Moisture SensitiveYes
Factory Pack Quantity1500
Low Voltage, 1:15 Differential PECL Clock
Divider and Fanout Buffer
8T33FS6222
DATA SHEET
General Description
The 8T33FS6222 is a bipolar monolithic differential clock fanout
buffer. Designed for most demanding clock distribution systems, the
8T33FS6222 supports various applications that require the
distribution of precisely aligned differential clock signals. Using SiGe
technology and a fully differential architecture, the device offers very
low skew outputs and superior digital signal characteristics. Target
applications for this clock driver is high performance clock distribution
in computing, networking and telecommunication systems.
Features
• Fifteen differential PECL outputs (four output banks)
• Two selectable differential PECL inputs
• Selectable ÷1 or ÷2 frequency divider
• Supports DC to 2GHz input frequency
• Single 3.3V or 2.5V supply
• Standard 52-Lead TQFP package with exposed pad for enhanced
thermal characteristics
• Supports industrial temperature range
• Lead-free RoHS 6 packaging
Functional Description
The 8T33FS6222 is designed for low skew clock distribution systems
and supports clock frequencies up to 2GHz. The CLK0 and CLK1
inputs can be driven by PECL compatible signals. Each of the four
output banks of two, three, four and six differential clock output pairs
can be independently configured to distribute the input frequency or
2 of the input frequency. The FSELA, FSELB, FSELC, FSELD, and
CLK_SEL are asychronous control inputs. Any changes of the
control inputs require a MR pulse for resynchronization of the 2
outputs. For the functionality of the MR control input, see
Figure 4.Functional Diagram.
In order to meet the tight skew specification of the device, both
outputs of a differential output pair should be terminated, even if only
one output is used. In the case where not all ten outputs are used,
the output pairs on the same package side as the parts being used
on that side should be terminated.
The 8T33FS6222 can be operated from a single 3.3V or 2.5V supply.
.
8T33FS6222 REVISION 1 2/2/15
1
©2015 Integrated Device Technology, Inc.
Ask questions about development
Is it difficult to make an embedded system for handheld asset management? Where should I start?...
jqq850226 Embedded System
Pioneer Semiconductor, a high-performance RISC-V company, and SEGGER jointly launched a free commercial version of Embedded Studio
First of all, let me give you a preview. This high-performance MCU will be launched on ourfrequency measurement channel in the near future . Interested netizens are welcome to support it~Recently, Pio...
nmg Domestic Chip Exchange
STM32SPI bus driving capability
May I ask the class leader, how strong is the SPI bus driving capability of STM32, and how many SPI FLASH can it support at the same time? I can't find it in the manual. Please tell me if you know, an...
zqiaoshi stm32/stm8
How to install the downloaded offline version of windows embedd compact 7
How to install the downloaded offline version of Windows Embed Compact 7? It always prompts: a product key could not be found on the system to allow the installation....
haohaoxuexittxs Embedded System
After the exhibition, the company moved again
May was an unusual month. I was busy preparing for the Guangzhou Elevator Exhibition and then the company moved after I came back. I only had the chance to open my computer and browse the forums now. ...
眼大5子 Talking
Can multiple AD7949 chips share a common SPI interface?
[size=6]According to the timing requirements of the data sheet, CNV is used to start the conversion. So can it also be used as a chip select signal? Has anyone done this before? Please give me some ad...
flying510 ADI Reference Circuit

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 845  1732  1915  1470  2178  18  35  39  30  44 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号