NX3L4051-Q100
Single low-ohmic 8-channel analog switch
Rev. 1 — 7 August 2012
Product data sheet
1. General description
The NX3L4051-Q100 is a low-ohmic 8-channel analog switch, suitable for use as an
analog or digital multiplexer/demultiplexer. The NX3L4051-Q100 has three digital select
inputs (S1 to S3), eight independent inputs/outputs (Y0 to Y7) and a common input/output
(Z). All eight switches share an enable input (E). A HIGH on E causes all switches into the
high impedance OFF-state, independent of Sn.
Schmitt trigger action at the digital inputs makes the circuit tolerant to slower input rise and
fall times. Low threshold digital inputs allows this device to be driven by 1.8 V logic levels
in 3.3 V applications without significant increase in supply current I
CC
. This makes it
possible for the NX3L4051-Q100 to switch 4.3 V signals with a 1.8 V digital controller,
eliminating the need for logic level translation. The NX3L4051-Q100 allows signals with
amplitude up to V
CC
to be transmitted from Z to Yn or from Yn to Z. The low ON resistance
(0.5
)
and flatness (0.13
),
ensures minimal attenuation and distortion of transmitted
signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
1.7
(typical) at V
CC
= 1.4 V
1.0
(typical) at V
CC
= 1.65 V
0.6
(typical) at V
CC
= 2.3 V
0.5
(typical) at V
CC
= 2.7 V
0.5
(typical) at V
CC
= 4.3 V
Break-before-make switching
High noise immunity
ESD protection:
MIL-STD-883, method 3015 Class 3A exceeds 7500 V
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 8000 V for switch ports
CMOS low-power consumption
NXP Semiconductors
NX3L4051-Q100
Single low-ohmic 8-channel analog switch
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at V
CC
= 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below V
CC
High current handling capability (350 mA continuous current under 3.3 V supply)
3. Applications
Cell phone
PDA
Portable media player
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
NX3L4051HR-Q100
40 C
to +125
C
HXQFN16
Description
plastic thermal enhanced extremely thin quad flat
package; no leads; 16 terminals;
body 3
3
0.5 mm
Version
SOT1039-2
Type number
NX3L4051PW-Q100
40 C
to +125
C
TSSOP16
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
5. Marking
Table 2.
Marking codes
Marking code
M41
X3L4051
Type number
NX3L4051HR-Q100
NX3L4051PW-Q100
NX3L4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
2 of 23
NXP Semiconductors
NX3L4051-Q100
Single low-ohmic 8-channel analog switch
6. Functional diagram
V
CC
16
13 Y0
S1 11
14 Y1
S2 10
15 Y2
12 Y3
S3 9
1-OF-8
DECODER
LOGIC
13
S1
S2
S3
11
10
9
14
15
12
1
5
2
E
6
3
Z
001aal657
1 Y4
Y0
Y1
Y2
Y3
Y4
Y5
Y6
E 6
5 Y5
2 Y6
4 Y7
3 Z
4
Y7
8
GND
001aal658
Pin numbers are shown for TSSOP16 package only.
Pin numbers are shown for TSSOP16 package only.
Fig 1.
Logic symbol
Fig 2.
Functional diagram
NX3L4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
3 of 23
NXP Semiconductors
NX3L4051-Q100
Single low-ohmic 8-channel analog switch
7. Pinning information
7.1 Pinning
terminal 1
index area
V
CC
14
Y6
16
15
Y4
13
Y2
Z
Y7
Y5
E
1
2
12
11
Y1
Y0
Y3
S1
Y4
Y6
1
2
3
4
5
6
7
8
NX3L4051-Q100
16 V
CC
15 Y2
14 Y1
13 Y0
12 Y3
11 S1
10 S2
9
aaa-003472
NX3L4051-Q100
3
4
5
6
7
8
10
9
Z
Y7
Y5
E
n.c.
GND
n.c.
S3
S2
aaa-003471
GND
S3
Transparent top view
Fig 3.
Pin configuration SOT1039-2 (HXQFN16)
Fig 4.
Pin configuration SOT403-1 (TSSOP16)
7.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT1039-2
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 11, 12, 13, 10, 15, 3, 16, 2
Z
E
n.c.
GND
S1, S2, S3
V
CC
1
4
5
6
9, 8, 7
14
SOT403-1
13, 14, 15, 12, 1, 5, 2, 4
3
6
7
8
11, 10, 9
16
independent input or output
independent output or input
enable input (active LOW)
not connected
ground (0 V)
select input
supply voltage
Description
NX3L4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
4 of 23
NXP Semiconductors
NX3L4051-Q100
Single low-ohmic 8-channel analog switch
8. Functional description
Table 4.
Input
E
L
L
L
L
L
L
L
L
H
[1]
Function table
[1]
Channel ON
S3
L
L
L
L
H
H
H
H
X
S2
L
L
H
H
L
L
H
H
X
S1
L
H
L
H
L
H
L
H
X
Y0 = Z
Y1 = Z
Y2 = Z
Y3 = Z
Y4 = Z
Y5 = Z
Y6 = Z
Y7 = Z
switches off
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
SW
I
IK
I
SK
I
SW
Parameter
supply voltage
input voltage
switch voltage
input clamping current
switch clamping current
switch current
V
I
<
0.5
V
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
SW
>
0.5
V or V
SW
< V
CC
+ 0.5 V;
source or sink current
V
SW
>
0.5
V or V
SW
< V
CC
+ 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
T
stg
P
tot
storage temperature
total power dissipation
T
amb
=
40 C
to +125
C
HXQFN16
TSSOP16
[1]
[2]
[3]
[4]
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
For HXQFN16 package: above 135
C
the value of P
tot
derates linearly with 16.9 mW/K.
For TSSOP16 package: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
[3]
[4]
Conditions
Sn and E
[1]
[2]
Min
0.5
0.5
0.5
50
-
-
-
Max
+4.6
+4.6
-
50
350
500
Unit
V
V
mA
mA
mA
mA
V
CC
+ 0.5 V
65
-
-
+150
250
500
C
mW
mW
NX3L4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
5 of 23