Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MPC5675K
Rev. 8, 10/2013
MPC5675K
Qorivva MPC5675K
Microcontroller Data Sheet
1
1.1
MAPBGA–225
15 mm x 15 mm
QFN12
##_mm_x_##mm
Introduction
Document overview
1
SOT-343R
##_mm_x_##mm
473 MAPBGA
(19 x 19 mm)
TBD
PKG-TBD
## mm x ## mm
257 MAPBGA
(14 x 14 mm)
This document provides electrical specifications, pin
assignments, and package diagrams for the Qorivva
MPC5675K series of microcontroller units (MCUs).
1.2
Description
2
The Qorivva MPC5675K microcontroller, a SafeAssure
solution, is a 32-bit embedded controller designed for
advanced driver assistance systems with RADAR, CMOS
imaging, LIDAR and ultrasonic sensors, and multiple 3-phase
motor control applications as in hybrid electric vehicles
(HEV) in automotive and high temperature industrial
applications.
A member of Freescale Semiconductor’s Qorivva
MPC5500/5600 family, it contains the Book E compliant
Power Architecture technology core with Variable Length
Encoding (VLE). This core complies with the Power
Architecture embedded category, and is 100 percent user
mode compatible with the original Power PC user
instruction set architecture (UISA). It offers system
performance up to four times that of its MPC5561
predecessor, while bringing you the reliability and familiarity
of the proven Power Architecture technology.
A comprehensive suite of hardware and software
development tools is available to help simplify and speed
system design. Development support is available from
leading tools vendors providing compilers, debuggers and
simulation development environments.
3
4
5
6
7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5 Feature list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.6 Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . 18
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 70
3.3 Recommended operating conditions . . . . . . . . . . . . . . 71
3.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 73
3.5 Electromagnetic interference (EMI) characteristics . . . 74
3.6 Electrostatic discharge (ESD) characteristics. . . . . . . . 75
3.7 Static latch-up (LU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
3.8 Power Management Controller (PMC)
electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.9 Supply current characteristics . . . . . . . . . . . . . . . . . . . 77
3.10 Temperature sensor electrical characteristics . . . . . . . 78
3.11 Main oscillator electrical characteristics . . . . . . . . . . . . 78
3.12 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . 79
3.13 16 MHz RC oscillator electrical characteristics. . . . . . . 80
3.14 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . 81
3.15 Flash memory electrical characteristics . . . . . . . . . . . . 86
3.16 SRAM memory electrical characteristics . . . . . . . . . . . 88
3.17 GP pads specifications . . . . . . . . . . . . . . . . . . . . . . . . . 88
3.18 PDI pads specifications . . . . . . . . . . . . . . . . . . . . . . . . 91
3.19 DRAM pad specifications . . . . . . . . . . . . . . . . . . . . . . . 94
3.20 RESET characteristics . . . . . . . . . . . . . . . . . . . . . . . . 101
3.21 Reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
3.22 Peripheral timing characteristics. . . . . . . . . . . . . . . . . 108
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
4.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . 132
Orderable parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 138
© Freescale Semiconductor, Inc., 2009–2013. All rights reserved.
Introduction
1.4
Block diagram
Figure 1
shows a top-level block diagram of the MPC5675K device.
e200z7d
Core_0
SPE2
VLE
Debug
JTAG
Nexus
Redundancy
Checker[0]
PMC
ECSM_0
STM
SWT_0
INTC
SEMA4
e200z7d
Core_1
SPE2
VLE
MMU
I-CACHE
D-CACHE
MMU
I-CACHE
D-CACHE
l
Redundancy
Checker[5]
PDI
Ethernet
PMC
ECSM_1
STM
SWT_1
INTC
SEMA4
DMA_0
DMA_1
Crossbar switch (XBAR_2)
Crossbar switch (XBAR_0)
Memory protection unit
Redundancy
Checker[7]
Redundancy
Checker[6]
DDR Controller
External Bus
Interface
PFLASHC
PFLASHC
Crossbar switch (XBAR_1)
Memory protection unit
2MB Flash with ECC Logic
SRAM with ECC Logic
Redundancy
Checker[3]
SRAM with ECC Logic
PBRIDGE
PBRIDGE
Redundancy
Checker[4]
PBRIDGE
Redundancy
Checker[2]
Secondary PLL
IRCOSC
FMPLL
TSENS
SSCM
BAM
CMU
CMU
CMU
CRC
CRC
DSPI
DSPI
DSPI
FlexPWM
FlexPWM
FlexPWM
FlexCAN
FlexCAN
FlexCAN
FlexCAN
WakeUp
LINFlex
LINFlex
LINFlex
LINFlex
eTimer
eTimer
eTimer
XOSC
ADC
BAM
CMU
CRC
CTU
DSPI
EBI
ECC
ECSM
eDMA
FCCU
FEC
FlexCAN
FlexPWM
FMPLL
I2C
INTC
– Analog-to-digital converter
– Boot assist module
– Clock monitoring unit
– Cyclic redundancy check unit
– Cross triggering unit
– Deserial serial peripheral interface
– External bus interface
– Error correction code
– Error correction status module
– Enhanced direct memory access controller
– Fault collection and control unit
– Fast Ethernet controller
– Controller area network controller
– Pulse width modulator module
– Frequency-modulated phase-locked loop
– Inter-integrated circuit controller
– Interrupt controller
IRCOSC
JTAG
MC
mDDR
PBRIDGE
PDI
PIT
PMC
RC
RTC
SEMA4
SIUL
SSCM
STM
SWT
TSENS
XOSC
– Internal RC oscillator
– Joint Test Action Group interface
– Mode entry, clock, reset, and power modules
– Mobile double data rate dynamic RAM
– Peripheral bridge
– Parallel data interface
– Periodic interrupt timer
– Power management controller
– Redundancy checker
– Real time clock
– Semaphore unit
– System integration unit Lite
– System status and configuration module
– System timer module
– Software watchdog timer
– Temperature sensor
– Crystal oscillator
Figure 1. MPC5675K block diagram
MPC5675K Microcontroller Data Sheet, Rev. 8
Freescale Semiconductor
5
FCCU
SIUL
ADC
ADC
ADC
ADC
CTU
CTU
MC
I
2
C
I
2
C
I
2
C
PIT
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