DSPIC33FJ16MC101-E-SS datasheet, PDF

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DSPIC33FJ16MC101-E-SS: DescriptionIn-Circuit Debuggers MPLAB ICD3; Categorysemiconductor The embedded processor and controller; File Size4MB，393 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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DSPIC33FJ16MC101-E-SS Overview

In-Circuit Debuggers MPLAB ICD3

DSPIC33FJ16MC101-E-SS Parametric

Parameter Name	Attribute value
Product Category	Digital Signal Processors & Controllers - DSP, DSC
Manufacturer	Microchip
RoHS	Details
Package / Case	SSOP-20
Product	DSCs
Core	dsPIC33FJ
Maximum Clock Frequency	32 MHz
Program Memory Size	16 kB
Data RAM Size	1 kB
Operating Supply Voltage	3.3 V
Maximum Operating Temperature	+ 125 C
Packaging	Tube
Data Bus Width	16 bit
Height	1.75 mm
Interface Type	I2C, JTAG, SPI, UART
Length	7.2 mm
Minimum Operating Temperature	- 40 C
Number of I/Os	35 I/O
Number of Timers/Counters	3 Timer
Processor Series	dsPIC33F
Program Memory Type	Flash
Factory Pack Quantity	67
Width	5.3 mm
Unit Weight	0.016000 oz

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dsPIC33FJ16(GP/MC)101/102 AND

dsPIC33FJ32(GP/MC)101/102/104

16-Bit Digital Signal Controllers

(up to 32-Kbyte Flash and 2-Kbyte SRAM)

Operating Conditions

• 3.0V to 3.6V, -40

C to +125

C, DC to 16 MIPS

Advanced Analog Features

• ADC module:

- 10-bit, 1.1 Msps with four S&H

- Four analog inputs on 18-pin devices and up to

14 analog inputs on 44-pin devices

• Flexible and Independent ADC Trigger Sources

• Three Comparator modules

• Charge Time Measurement Unit (CTMU):

- Supports mTouch™ capacitive touch sensing

- Provides high-resolution time measurement (1 ns)

- On-chip temperature measurement

•

3.0V to 3.6V, -40

C to +150

C, DC to 5 MIPS

Core: 16-Bit dsPIC33F CPU

•

Code-Efficient (C and Assembly) Architecture

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle Mixed-Sign MUL plus Hardware Divide

32-Bit Multiply Support

Clock Management

•

±0.25% Internal Oscillator

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast Wake-up and Start-up

Timers/Output Compare/Input Capture

• Up to Five General Purpose Timers:

- One 16-bit and up to two 32-bit timers/counters

• Two Output Compare modules

• Three Input Capture modules

• Peripheral Pin Select (PPS) to allow Function Remap

Communication Interfaces

• UART module (4 Mbps):

- With support for LIN/J2602 Protocols and IrDA

• 4-Wire SPI module (8 MHz maximum speed):

- Remappable pins in 32-Kbyte Flash devices

• I

C™ module (400 kHz)

Power Management

•

Low-Power Management modes (Sleep, Idle, Doze)

Integrated Power-on Reset and Brown-out Reset

1 mA/MHz Dynamic Current (typical)

30 µA I

Current (typical)

PWM

Up to Three PWM Pairs

Two Dead-Time Generators

31.25 ns PWM Resolution

PWM Support for:

- Inverters, PFC, UPS

- BLDC, PMSM, ACIM, SRM

• Class B-Compliant Fault Inputs

• Possibility of ADC Synchronization with PWM Signal

•

Input/Output

• Sink/Source 10 mA or 6 mA, Pin-Specific for Standard

, up to 16 mA or 12 mA for Non-Standard V

• 5V Tolerant Pins

• Up to 20 Selectable Open-Drain and Pull-ups

• Three External Interrupts (two are remappable)

Qualification and Class B Support

• AEC-Q100 REV G (Grade 0 -40

C to +150

• Class B Safety Library, IEC 60730, UDE Certified

Debugger Development Support

• In-Circuit and In-Application Programming

• Up to Three Complex Data Breakpoints

• Trace and Run-Time Watch



2011-2014 Microchip Technology Inc.

DS70000652F-page 1

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