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5CGXBC5C6U19C7N

Description
FPGA - Field Programmable Gate Array FPGA - Cyclone V GX 2908 LABs 240 IOs
Categorysemiconductor    Programmable logic devices   
File Size835KB,41 Pages
ManufacturerAltera (Intel)
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5CGXBC5C6U19C7N Overview

FPGA - Field Programmable Gate Array FPGA - Cyclone V GX 2908 LABs 240 IOs

5CGXBC5C6U19C7N Parametric

Parameter NameAttribute value
Product CategoryFPGA - Field Programmable Gate Array
ManufacturerAltera (Intel)
RoHSDetails
ProductCyclone V GX
Number of Logic Elements77000
Number of Logic Array Blocks - LABs29080
Number of I/Os240 I/O
Operating Supply Voltage1.1 V
Minimum Operating Temperature0 C
Maximum Operating Temperature+ 70 C
Mounting StyleSMD/SMT
Package / CaseBGA-484
PackagingTray
Data Rate3.125 Gb/s
Embedded Block RAM - EBR424 kbit
Maximum Operating Frequency800 MHz
Moisture SensitiveYes
Number of Transceivers6 Transceiver
Factory Pack Quantity84
Total Memory4884 kbit
2016.06.10
Cyclone V Device Overview
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CV-51001
The Cyclone
®
V devices are designed to simultaneously accommodate the shrinking power consumption,
cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and
cost-sensitive applications.
Enhanced with integrated transceivers and hard memory controllers, the Cyclone V devices are suitable
for applications in the industrial, wireless and wireline, military, and automotive markets.
Cyclone V Device Handbook: Known Issues
Lists the planned updates to the Cyclone V Device Handbook chapters.
Related Information
Key Advantages of Cyclone V Devices
Table 1: Key Advantages of the Cyclone V Device Family
Advantage
Supporting Feature
Lower power consumption • Built on TSMC's 28 nm low-power (28LP) process technology and
includes an abundance of hard intellectual property (IP) blocks
• Up to 40% lower power consumption than the previous generation
device
Improved logic integration • 8-input adaptive logic module (ALM)
and differentiation capabil‐ • Up to 13.59 megabits (Mb) of embedded memory
ities
• Variable-precision digital signal processing (DSP) blocks
Increased bandwidth
capacity
Hard processor system
(HPS) with integrated
ARM
®
Cortex
-A9
MPCore processor
• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers
• Hard memory controllers
• Tight integration of a dual-core ARM Cortex-A9 MPCore processor,
hard IP, and an FPGA in a single Cyclone V system-on-a-chip (SoC)
• Supports over 128 Gbps peak bandwidth with integrated data coherency
between the processor and the FPGA fabric
2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html.
Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
©
ISO
9001:2008
Registered
www.altera.com
101 Innovation Drive, San Jose, CA 95134
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