MC33363A
High Voltage Switching
Regulator
The MC33363A is a monolithic high voltage switching regulator
that is specifically designed to operate from a rectified 240 Vac line
source. This integrated circuit features an on-
-chip 700 V / 1.5 A
SENSEFETt power switch, 500 V active off-
-line startup FET, duty
cycle controlled oscillator, current limiting comparator with a
programmable threshold and leading edge blanking, latching pulse
width modulator for double pulse suppression, high gain error
amplifier, and a trimmed internal bandgap reference. Protective
features include cycle- -cycle current limiting, input undervoltage
-by-
lockout with hysteresis, output overvoltage protection, and thermal
shutdown. This device is available in a 16-
-lead dual- -line and
-in-
wide body surface mount packages.
Features
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MARKING
DIAGRAMS
SO-
-16W
DW SUFFIX
CASE 751N
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb--Free Package
16
MC33363ADW
AWLYYWWG
Enhanced Power Capability Over MC33363
On-
-Chip 700 V, 1.5 A SENSEFET Power Switch
Rectified 240 Vac Line Source Operation
On-
-Chip 500 V Active Off-
-Line Startup FET
Latching PWM for Double Pulse Suppression
Cycle- -Cycle Current Limiting
-By-
Input Undervoltage Lockout with Hysteresis
Output Overvoltage Protection Comparator
Trimmed Internal Bandgap Reference
Internal Thermal Shutdown
These are Pb-
-Free Devices*
PIN CONNECTIONS
Startup Input
1
16
Power Switch
Drain
V
CC
GND
3
4
5
13
12
11
10
9
(Top View)
GND
Overvoltage
Protection Input
Voltage Feedback
Input
Compensation
AC Input
Startup Input
Regulator
Output
8
6
R
T
C
T
7
OSC
PWM Latch
S
Q
PWM
R
I
pk
Thermal
LEB
Compensation
9
EA
GND
4, 5, 12, 13
This device contains 221 active
1. Simplified
transistors.
Application
10
Voltage
Feedback
Input
Driver
OVP
1
R
T
C
T
V
CC
6
7
8
Mirror
Startup
Reg
UVLO
Regulator Output
DC Output
3
Overvoltage
Protection
Input
11
16
Power Switch
Drain
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Figure
*For additional information on our Pb--Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
1
Publication Order Number:
MC33363A/D
Semiconductor Components Industries, LLC, 2010
November, 2010 - Rev. 8
-
MC33363A
MAXIMUM RATINGS
(Note 1)
Rating
Power Switch (Pin 16)
Drain Voltage
Drain Current
Startup Input Voltage (Pin 1)
Power Supply Voltage (Pin 3)
Input Voltage Range
Voltage Feedback Input (Pin 10)
Compensation (Pin 9)
Overvoltage Protection Input (Pin 11)
R
T
(Pin 6)
C
T
(Pin 7)
Thermal Characteristics -- P Suffix, Dual--In--Line Case 648E
Thermal Resistance, Junction--to--Air
Thermal Resistance, Junction--to--Case
(Pins 4, 5, 12, 13)
DW Suffix, Surface Mount Case 751N
Thermal Resistance, Junction--to--Air
Thermal Resistance, Junction--to--Case
(Pins 4, 5, 12, 13)
Refer to Figures 17 and 18 for additional thermal information.
Operating Junction Temperature
Storage Temperature
Symbol
V
DS
I
DS
V
in
V
CC
V
IR
Value
700
1.5
500
40
--1.0 to V
reg
Unit
V
A
V
V
V
C/W
R
θJA
R
θJC
R
θJA
R
θJC
80
15
95
15
T
J
T
stg
--25 to +150
--55 to +150
C
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL--STD--883, Method 3015.
Machine Model Method 150 V.
ELECTRICAL CHARACTERISTICS
(V
CC
= 20 V, R
T
= 10 k, C
T
= 390 pF, C
Pin8
= 1.0
mF,
for typical values T
J
= 25C, for min/max
values T
J
is the operating junction temperature range that applies (Note 2), unless otherwise noted)
Characteristic
REGULATOR
(Pin 8)
Output Voltage (I
O
= 0 mA, T
J
= 25C)
Line Regulation (V
CC
= 20 V to 40 V)
Load Regulation (I
O
= 0 mA to 10 mA)
Total Output Variation over Line, Load, and Temperature
OSCILLATOR
(Pin 7)
Frequency
C
T
= 390 pF
T
J
= 25C (V
CC
= 20 V)
T
J
= T
low
to T
high
(V
CC
= 20 V to 40 V)
C
T
= 2.0 nF
T
J
= 25C (V
CC
= 20 V)
T
J
= T
low
to T
high
(V
CC
= 20 V to 40 V)
Frequency Change with Voltage (V
CC
= 20 V to 40 V)
ERROR AMPLIFIER
(Pins 9, 10)
Voltage Feedback Input Threshold
Line Regulation (V
CC
= 20 V to 40 V, T
J
= 25C)
Input Bias Current (V
FB
= 2.6 V)
Open Loop Voltage Gain (T
J
= 25C)
2. Tested junction temperature range for the MC33363A:
T
low
= --25C
T
high
= +125C
V
FB
Reg
line
I
IB
A
VOL
2.52
--
--
--
2.6
0.6
20
82
2.68
5.0
500
--
V
mV
nA
dB
f
OSC
260
255
60
59
Δf
OSC
/ΔV
--
285
--
67.5
--
0.1
310
315
75
76
2.0
kHz
kHz
V
reg
Reg
line
Reg
load
V
reg
5.5
--
--
5.3
6.5
30
44
--
7.5
500
200
8.0
V
mV
mV
V
Symbol
Min
Typ
Max
Unit
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2
MC33363A
ELECTRICAL CHARACTERISTICS
(V
CC
= 20 V, R
T
= 10 k, C
T
= 390 pF, C
Pin8
= 1.0
mF,
for typical values T
J
= 25C, for min/max
values T
J
is the operating junction temperature range that applies (Note 2), unless otherwise noted)
Characteristic
ERROR AMPLIFIER
(Pins 9, 10)
Gain Bandwidth Product (f = 100 kHz, T
J
= 25C)
Output Voltage Swing
High State (I
Source
= 100
mA,
V
FB
< 2.0 V)
Low State (I
Sink
= 100
mA,
V
FB
> 3.0 V)
OVERVOLTAGE DETECTION
(Pin 11)
Input Threshold Voltage
Input Bias Current (V
in
= 2.6 V)
PWM COMPARATOR
(Pins 7, 9)
Duty Cycle
Maximum (V
FB
= 0 V)
Minimum (V
FB
= 2.7 V)
POWER SWITCH
(Pin 16)
Drain--Source On--State Resistance (I
D
= 200 mA)
T
J
= 25C
T
J
= T
low
to T
high
Drain--Source Off--State Leakage Current (V
DS
= 650 V)
T
J
= 25C
T
J
= T
low
to T
high
Rise Time
Fall Time
OVERCURRENT COMPARATOR
(Pin 16)
Current Limit Threshold (R
T
= 13 k)
STARTUP CONTROL
(Pin 1)
Peak Startup Current (V
in
= 50 V) (T
J
= --25C to 100C)
V
CC
= 0 V
V
CC
= (V
th(on)
-- 0.2 V)
Off--State Leakage Current (V
in
= 50 V, V
CC
= 20 V)
UNDERVOLTAGE LOCKOUT
(Pin 3)
Startup Threshold (V
CC
Increasing)
Minimum Operating Voltage After Turn--On
TOTAL DEVICE
(Pin 3)
Power Supply Current
Startup (V
CC
= 10 V, Pin 1 Open)
Operating
2. Tested junction temperature range for the MC33363A:
T
low
= --25C
T
high
= +125C
I
CC
--
--
0.27
3.4
0.5
5.0
mA
V
th(on)
V
CC(min)
11
7.5
14.9
9.5
18
11.5
V
V
I
start
2.0
2.0
--
5.0
5.0
40
8.0
8.0
200
mA
I
lim
0.7
0.9
1.1
A
R
DS(on)
--
--
I
D(off)
--
--
--
--
7.5
--
0.25
--
50
50
9.0
20
1.0
50
--
--
Ω
DC
(max)
DC
(min)
48
--
50
0
52
0
%
V
th
I
IB
2.47
--
2.6
100
2.73
500
V
nA
GBW
V
OH
V
OL
--
4.0
--
1.0
5.3
0.2
--
--
0.35
MHz
V
Symbol
Min
Typ
Max
Unit
mA
t
r
t
f
ns
ns
I
D(off)
mA
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3
MC33363A
f OSC , OSCILLATOR FREQUENCY (Hz)
C
T
= 100 pF
500 k
C = 200 pF
T
200 k
C
T
= 500 pF
100 k
C
T
= 1.0 nF
50 k
20 k
C
T
= 2.0 nF
C
T
= 5.0 nF
C = 10 nF
V
CC
= 20 V
T
A
= 25C
I PK, POWER SWITCH PEAK DRAIN CURRENT (A)
1.0 M
1.5
1.0
0.8
0.6
0.4
0.3
0.2
0.15
7.0
Inductor supply voltage and inductance value are
adjusted so that I
pk
turn--off is achieved at 5.0
ms.
10
15
20
30
40
V
CC
= 20 V
C
T
= 1.0
mF
T
A
= 25C
10 k
T
7.0
10
15
20
30
50
70
50
70
R
T
, TIMING RESISTOR (kΩ)
R
T
, TIMING RESISTOR (kΩ)
Figure 2. Oscillator Frequency
versus Timing Resistor
Figure 3. Power Switch Peak Drain Current
versus Timing Resistor
Dmax, MAXIMUM OUTPUT DUTY CYCLE (%)
0.8
I chg /I dscg , OSCILLATOR
CHARGE/DISCHARGE CURRENT (mA)
0.5
0.3
0.2
0.15
0.1
0.08
7.0
10
15
20
30
V
CC
= 20 V
T
A
= 25C
70
60
R
D
/R
T
Ratio
Discharge Resistor
Pin 7 to GND
V
CC
= 20 V
C
T
= 2.0 nF
T
A
= 25C
50
40
50
70
30
1.0
R
C
/R
T
Ratio
Charge Resistor
Pin 7 to V
reg
2.0
3.0
5.0
7.0
10
TIMING RESISTOR RATIO
R
T
, TIMING RESISTOR (kΩ)
Figure 4. Oscillator Charge/Discharge
Current versus Timing Resistor
Figure 5. Maximum Output Duty Cycle
versus Timing Resistor Ratio
80
Gain
60
Phase
40
20
0
--20
10
100
1.0 k
10 k
V
CC
= 20 V
V
O
= 1.0 to 4.0 V
R
L
= 5.0 MΩ
C
L
= 2.0 pF
T
A
= 25C
,
EXCESS PHASE (DEGREES)
Vsat , OUTPUT SATURATION VOLTAGE (V)
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
100
0
30
60
90
0
--1.0
Source Saturation
(Load to Ground)
V
ref
-- 2.0
120
150
100 k
1.0 M
180
10 M
2.0
1.0
0
0
0.2
Sink Saturation
(Load to V
ref
)
GND
0.4
0.6
V
CC
= 20 V
T
A
= 25C
0.8
1.0
f, FREQUENCY (Hz)
I
O
, OUTPUT LOAD CURRENT (mA)
Figure 6. Error Amp Open Loop Gain and
Phase versus Frequency
Figure 7. Error Amp Output Saturation
Voltage versus Load Current
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4
MC33363A
V
CC
= 20 V
A
V
= --1.0
C
L
= 10 pF
T
A
= 25C
20 mV/DIV
V
CC
= 20 V
A
V
= --1.0
C
L
= 10 pF
T
A
= 25C
0.5 V/DIV
1.0
ms/DIV
1.80 V
3.00 V
1.75 V
1.75 V
1.70 V
0.50 V
1.0
ms/DIV
Figure 8. Error Amplifier Small Signal
Transient Response
Figure 9. Error Amplifier Large Signal
Transient Response
V reg, REGULATOR VOLTAGE CHANGE (mV)
0
I
start
, STARTUP CURRENT (mA)
V
CC
= 20 V
R
T
= 10 k
T
A
= 25C
8
7
6
5
4
3
2
1
0
0
2
4
6
8
10
V
CC
, SUPPLY VOLTAGE (V)
12
14
V
Pin1
= 50 V
T
A
= 25C
--20
--40
--60
--80
0
4.0
8.0
12
16
20
I
reg
, REGULATOR SOURCE CURRENT (mA)
Figure 10. Regulator Output Voltage
Change versus Source Current
Figure 11. Peak Startup Current
versus Power Supply Voltage
8
I
start
, STARTUP CURRENT (mA)
7
6
5
4
3
2
1
0
0
10
20
30
40
50
V
Pin1
, STARTUP PIN VOLTAGE (V)
V
CC
= 14 V
T
A
= 25C
V
CC
= 0 V
T
A
= 25C
Figure 12. Peak Startup Current versus Startup
Input Voltage
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