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8P34S1212NLGI8

Description
Clock Drivers u0026 Distribution 1 to 12 LVDS Output 1.8V Fanout Buffer
Categorysemiconductor    Analog mixed-signal IC   
File Size536KB,19 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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8P34S1212NLGI8 Overview

Clock Drivers u0026 Distribution 1 to 12 LVDS Output 1.8V Fanout Buffer

8P34S1212NLGI8 Parametric

Parameter NameAttribute value
Product CategoryClock Drivers & Distribution
ManufacturerIDT (Integrated Device Technology, Inc.)
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseVFQFPN-40
PackagingReel
Height0.9 mm
Length6 mm
Moisture SensitiveYes
Factory Pack Quantity5000
Width6 mm
1:12 LVDS Output 1.8V Fanout Buffer
IDT8P34S1212I
Datasheet
Description
The IDT8P34S1212I is a high-performance differential LVDS fanout
buffer. The device is designed for the fanout of high-frequency, very
low additive phase-noise clock and data signals. The
IDT8P34S1212I is characterized to operate from a 1.8V power
supply. Guaranteed output-to-output and part-to-part skew
characteristics make the IDT8P34S1212I ideal for those clock
distribution applications that demand well-defined performance and
repeatability.
Two selectable differential inputs and 12 low skew outputs are
available. The integrated bias voltage reference enables easy
interfacing of single-ended signals to the device inputs. The device is
optimized for low power consumption and low additive phase noise.
Features
12 low skew, low additive jitter LVDS output pairs
Two selectable, differential clock input pairs
Differential CLK0, CLK1 pairs can accept the following differential
input levels: LVDS, CML
Maximum input clock frequency: 1.2GHz (maximum)
LVCMOS/LVTTL interface levels for the control input select pin
Output skew: 10ps (typical)
Propagation delay: 340ps (typical)
Low additive phase jitter, RMS; f
REF
= 156.25MHz, V
PP
= 1V,
12kHz- 20MHz: 41fs (typical)
Maximum device current consumption (I
DD
): 227mA (maximum)
at 1.89V
Full 1.8V supply voltage
Lead-free (RoHS 6), 40-Lead VFQFN packaging
-40°C to 85°C ambient operating temperature
Block Diagram
Q0
nQ0
Q1
nQ1
Q2
nQ2
V
DD
Pin Assignment
GND
30
29
28
27
26
25
24
23
22
V
DD
31
Q8
32
nQ8
33
Q9
34
nQ9
35
Q10
36
nQ10
37
Q11
38
nQ11
39
V
DD
40
1
2
3
4
5
6
7
8
9
10
GND
21
20
V
DD
19
nQ3
18
Q3
17
nQ2
16
Q2
15
nQ1
14
Q1
13
nQ0
12
Q0
11
V
DD
nQ7
nQ6
nQ5
nQ4
Q7
Q6
Q5
IDT8P34S1212I
40-Lead VFQFN
6.0mm x 6.0mm x 0.90mm
package body
4.65mm x 4.65mm ePad Size
NL Package
Top View
CLK0
nCLK0
f
REF
V
DD
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q8
nQ8
VREF
CLK1
nCLK1
SEL
Q9
nQ9
Q10
nQ10
V
REF
V
REF
Q11
nQ11
©2017 Integrated Device Technology, Inc.
1
nCLK0
CLK0
CLK1
nCLK1
V
DD
V
DD
nc
Q4
SEL
November 24, 2017
nc
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