Integrated Precision Battery Sensor
for Automotive
ADuC7036
FEATURES
High precision ADCs
Dual channel, simultaneous sampling, 16-bit, Σ-Δ ADCs
Programmable ADC throughput from 1 Hz to 8 kHz
On-chip ±5 ppm/°C voltage reference
Current channel
Fully differential, buffered input
Programmable gain from 1 to 512
ADC input range: −200 mV to +300 mV
Digital comparators with current accumulator feature
Voltage channel
Buffered, on-chip attenuator for 12 V battery inputs
Temperature channel
External and on-chip temperature sensor options
Microcontroller
ARM7TDMI core, 16-/32-bit RISC architecture
20.48 MHz PLL with programmable divider
PLL input source
On-chip precision oscillator
On-chip low power oscillator
External (32.768 kHz) watch crystal
JTAG port supports code download and debug
Memory
96 kB Flash/EE memory, 6 kB SRAM
10,000-cycle Flash/EE endurance, 20-year Flash/EE
retention
In-circuit download via JTAG and LIN
On-chip peripherals
SAEJ2602/LIN 2.0-compatible (slave) support via UART
with hardware synchronization
Flexible wake-up I/O pin, master/slave SPI serial I/O
9-pin GPIO port, 3× general-purpose timers
Wake-up and watchdog timers
Power supply monitor and on-chip power-on reset
Power
Operates directly from 12 V battery supply
Current consumption
Normal mode 10 mA at 10 MHz
Low power monitor mode
Package and temperature range
48-lead, 7 mm × 7 mm LFCSP
Fully specified for −40°C to +115°C operation
APPLICATIONS
Battery sensing/management for automotive systems
FUNCTIONAL BLOCK DIAGRAM
NTRST
TMS
TDO
TCK
TDI
PRECISION ANALOG ACQUISITION
IIN+
IIN–
VBAT
RESULT
ACCUMULATOR
DIGITAL
COMPARATOR
ARM7TDMI
MCU
20MHz
BUF
PGA
16-BIT
Σ-∆
ADC
2.6V LDO
PSM
POR
ADuC7036
RESET
MEMORY
98kB FLASH
6kB RAM
XTAL1
PRECISION
OSC
LOW POWER
OSC
ON-CHIP PLL
XTAL2
VTEMP
MUX
BUF
16-BIT
Σ-∆
ADC
WU
3× TIMERS
WDT
WU TIMER
GPIO PORT
UART PORT
SPI PORT
LIN
STI
TEMPERATURE
SENSOR
VREF
GND_SW
PRECISION
REFERENCE
LIN/BSD
GPIO_0/IRQ0/SS
GPIO_7/IRQ4
GPIO_2/MISO
GPIO_3/MOSI
GPIO_1/SCLK
GPIO_4/ECLK
GPIO_5/IRQ1/RxD
GPIO_8/IRQ5
GPIO_6/TxD
REG_AVDD
REG_DVDD
IO_VSS
VDD
AGND
DGND
VSS
Figure 1.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2011 Analog Devices, Inc. All rights reserved.
07474-001
ADUC7036* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
•
ADUC7036 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
EVALUATION KITS
•
ADuC7036 QuickStart Plus Development System
DOCUMENTATION
Application Notes
•
AN-1138: LINB DLL Programmer's Guide
• AN-881: Flash/EE Memory Programming via LIN—
Protocol 4
Data Sheet
•
ADuC7036: Integrated Precision Battery Sensor for
Automotive Data Sheet
DISCUSSIONS
View all ADUC7036 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
TOOLS AND SIMULATIONS
•
Sigma-Delta ADC Tutorial
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
REFERENCE MATERIALS
Solutions Bulletins & Brochures
•
Emerging Energy Applications Solutions Bulletin, Volume
10, Issue 4
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
ADuC7036
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Electrical Specifications............................................................... 4
Timing Specifications ................................................................ 10
Absolute Maximum Ratings.......................................................... 15
ESD Caution................................................................................ 15
Pin Configuration and Function Descriptions........................... 16
Typical Performance Characteristics ........................................... 18
Terminology .................................................................................... 19
Theory of Operation ...................................................................... 20
Overview of the ARM7TDMI Core......................................... 20
Memory Organization ............................................................... 22
Reset ............................................................................................. 24
Flash/EE Memory........................................................................... 25
Programming Flash/EE Memory In-Circuit .......................... 25
Flash/EE Control Interface........................................................ 25
Flash/EE Memory Security ....................................................... 29
Flash/EE Memory Reliability.................................................... 31
Code Execution Time from SRAM and Flash/EE ..................... 31
On-Chip Kernel .......................................................................... 32
Memory Mapped Registers ....................................................... 35
Complete MMR Listing............................................................. 36
16-Bit, Σ-Δ Analog-to-Digital Converters .................................. 42
Current Channel ADC (I-ADC) .............................................. 42
ADC Ground Switch.................................................................. 45
ADC Noise Performance Tables............................................... 45
ADC MMR Interface ................................................................. 46
ADC Power Modes of Operation............................................. 55
ADC Comparator and Accumulator ....................................... 56
ADC Sinc3 Digital Filter Response.......................................... 56
ADC Calibration ........................................................................ 59
ADC Diagnostics........................................................................ 60
Power Supply Support Circuits..................................................... 61
System Clocks ................................................................................. 62
System Clock Registers .............................................................. 63
Low Power Clock Calibration................................................... 66
Processor Reference Peripherals................................................... 68
Interrupt System ......................................................................... 68
Timers .............................................................................................. 71
Synchronization Across Asynchronous Clock Domains ...... 71
Programming the Timers.......................................................... 72
Timer0—Lifetime Timer........................................................... 74
Timer1—General-Purpose Timer ........................................... 76
Timer2—Wake-Up Timer......................................................... 78
Timer3—Watchdog Timer........................................................ 80
Timer4—STI Timer ................................................................... 82
General-Purpose I/O ..................................................................... 84
High Voltage Peripheral Control Interface ................................. 95
Wake-UP (WU) Pin................................................................. 102
Handling Interrupts from the High Voltage Peripheral
Control Interface ...................................................................... 103
Low Voltage Flag (LVF)........................................................... 103
High Voltage Diagnostics........................................................ 103
UART Serial Interface .................................................................. 104
Baud Rate Generation.............................................................. 104
UART Register Definitions ..................................................... 105
Serial Peripheral Interface ........................................................... 110
MISO Pin................................................................................... 110
MOSI Pin................................................................................... 110
SCLK Pin ................................................................................... 110
SS Pin ......................................................................................... 110
SPI Register Definitions .......................................................... 110
Serial Test Interface ...................................................................... 113
LIN (Local Interconnect Network) Interface............................ 116
LIN MMR Description ............................................................ 116
LIN Hardware Interface .......................................................... 120
Bit Serial Device (BSD) Interface ............................................... 124
BSD Communication Hardware Interface............................ 124
BSD Related MMRs ................................................................. 125
BSD Communication Frame .................................................. 126
BSD Data Reception................................................................. 127
BSD Data Transmission........................................................... 127
Wake-Up from BSD Interface................................................. 127
Part Identification......................................................................... 128
Schematic....................................................................................... 131
Outline Dimensions ..................................................................... 132
Ordering Guide ........................................................................ 132
Rev. C | Page 2 of 132
ADuC7036
REVISION HISTORY
2/11—Rev. B to Rev. C
Changes to I
DD
(MCU Normal Mode) Parameter, Table 1 ..........9
Changes to On-Chip Kernel Section ............................................32
Added Figure 16; Renumbered Sequentially ...............................34
Changes to Table 100 ....................................................................130
Changes to Ordering Guide.........................................................132
4/10—Rev. A to Rev. B
Changes to Table 6 ..........................................................................15
Changes to Timers Section ............................................................70
7/09—Rev. 0 to Rev. A
Changes to Features Section ............................................................1
Changes to Figure 1...........................................................................1
Changes to Table 1 ....................................................................4, 8, 9
Changes to Table 3 ..........................................................................11
Changes to Table 4 ..........................................................................12
Changes to Table 5 ..........................................................................13
Changes to Figure 8, Figure 9, and Figure 10..............................18
Changes to Theory of Operation Section ....................................20
Changes to Flash/EE Memory Reliability Section......................31
Changes to Table 46 ........................................................................64
Changes to Normal Interrupt (IRQ) Request Section ...............68
Changes to Timer0—Liftime Timer Section...............................71
Changes to Timer1 Section............................................................73
Changes to Timer2—Wake-Up Timer Section ...........................75
Changes to Timer3 Interface Section ...........................................77
Changes to Timer4—STI Timer Section .....................................79
Changes to BSD Communication Frame Section.....................123
Changes to Table 97 ......................................................................125
Changes to Figure 57 ....................................................................128
Changes to Ordering Guide.........................................................129
10/08—Revision 0: Initial Version
Rev. C | Page 3 of 132
ADuC7036
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VDD = 3.5 V to 18 V, VREF = 1.2 V internal reference, f
CORE
= 20.48 MHz (unless otherwise noted) driven from external 32.768 kHz
watch crystal or on-chip precision oscillator. All specifications T
A
= −40°C to +115°C, unless otherwise noted.
Table 1.
Parameter
ADC SPECIFICATIONS
Conversion Rate
1
Test Conditions/Comments
Chop off, ADC normal operating mode
Chop on, ADC normal operating mode
Chop on, ADC low power mode
Valid for all ADC update rates and ADC modes
Chop off, 1 LSB = (36.6/gain) μV
Chop on
Chop on, low power or low power plus mode, MCU
powered down
Chop on, normal mode
Chop off, valid for ADC gains of 4 to 64, normal mode
Chop off, valid for ADC gains of 128 to 512, normal
mode
Chop on
Normal mode
Low power mode, using ADCREF MMR
Low power plus mode, using precision VREF
Min
4
4
1
16
−10
−2
100
+0.5
±10
±3
±0.5
−50
−1.25
0.03
30
10
±0.1
±0.2
±0.2
3
±0.1
60
75
100
120
0.8
1
0.6
0.8
2.1
1.6
2.6
2.0
2.5
14
1.25
0.35
0.1
0.6
±60
+10
+2
−300
−3
Typ
Max
8000
2600
650
Unit
Hz
Hz
Hz
Bits
ppm of FSR
LSB
μV
nV
μV
LSB/°C
nV/°C
nV/°C
+0.5
+4
+1
Current Channel
No Missing Codes
1
Integral Nonlinearity
1, 2
Offset Error
2, 3 , 4 , 5
Offset Error
1
,
3
, 6
Offset Error
1, 3
Offset Error
1, 3
Offset Error Drift
6
Offset Error Drift
6
Offset Error Drift
6
Total Gain Error
1
,
3
, 7 , 8 , 9 , 10
Total Gain Error
1
,
3
, 7, 9
Total Gain Error
1
,
3
, 7, 9, 11
Gain Drift
PGA Gain Mismatch Error
Output Noise
1
, 12
−0.5
−4
−1
%
%
%
ppm/°C
%
90
115
150
180
1.2
1.5
0.9
1.2
4.1
2.4
3.9
2.8
3.5
21
1.9
0.5
0.15
0.9
nV rms
nV rms
nV rms
nV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
4 Hz update rate, gain = 512, ADCFLT = 0xBF1D
4 Hz update rate, gain = 512, ADCFLT = 0x3F1D
10 Hz update rate, gain = 512, ADCFLT = 0x961F
10 Hz update rate, gain = 512, ADCFLT = 0x161F
1 kHz update rate, gain ≥ 64, ADCFLT = 0x8101
1 kHz update rate, gain ≥ 64, ADCFLT = 0x0101
1 kHz update rate, gain = 512, ADCFLT = 0x0007
1 kHz update rate, gain = 32, ADCFLT = 0x0007
1 kHz update rate, gain = 8, ADCFLT = 0x8101
1 kHz update rate, gain = 8, ADCFLT = 0x0007
1 kHz update rate, gain = 8, ADCFLT = 0x0101
1 kHz update rate, gain = 4, ADCFLT = 0x0007
8 kHz update rate, gain = 32, ADCFLT = 0x0000
8 kHz update rate, gain = 4, ADCFLT = 0x0000
ADC low power mode, f
ADC
= 10 Hz, gain = 128
ADC low power mode, f
ADC
= 1 Hz, gain = 128
ADC low power plus mode, f
ADC
= 1 Hz, gain = 512
ADC low power plus mode, f
ADC
= 250 Hz, gain = 512
Rev. C | Page 4 of 132
京公网安备 11010802033920号
EEWORLD
