ST10F269
16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM
PRELIMINARY DATA
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HIGH PERFORMANCE 40MHz CPU WITH DSP
FUNCTION
– 16-BIT CPU WITH 4-STAGE PIPELINE
– 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX
CPU CLOCK
– MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT
MULTIPLICATION, 40-BIT ACCUMULATOR
– REPEAT UNIT
– ENHANCED BOOLEAN BIT MANIPULATION FA-
CILITIES
– ADDITIONAL INSTRUCTIONS TO SUPPORT HLL
AND OPERATING SYSTEMS
– SINGLE-CYCLE CONTEXT SWITCHING SUP-
PORT
MEMORY ORGANIZATION
– 256K BYTE ON-CHIP FLASH MEMORY SINGLE
VOLTAGE WITH ERASE/PROGRAM CONTROLLER.
– 100K ERASING/PROGRAMMING CYCLES.
– UP TO 16M BYTE LINEAR ADDRESS SPACE FOR
CODE AND DATA (5M BYTES WITH CAN)
– 2K BYTE ON-CHIP INTERNAL RAM (IRAM)
– 10K BYTE ON-CHIP EXTENSION RAM (XRAM)
FAST AND FLEXIBLE BUS
– PROGRAMMABLE EXTERNAL BUS CHARACTE-
RISTICS FOR DIFFERENT ADDRESS RANGES
– 8-BIT OR 16-BIT EXTERNAL DATA BUS
– MULTIPLEXED OR DEMULTIPLEXED EXTERNAL
ADDRESS/DATA BUSES
– FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
– HOLD-ACKNOWLEDGE BUS ARBITRATION SUP-
PORT
INTERRUPT
– 8-CHANNEL PERIPHERAL EVENT CONTROLLER
FOR SINGLE CYCLE INTERRUPT DRIVEN DATA
TRANSFER
– 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH
56 SOURCES, SAMPLING RATE DOWN TO 25ns
TIMERS
– TWO MULTI-FUNCTIONAL GENERAL PURPOSE
TIMER UNITS WITH 5 TIMERS
TWO 16-CHANNEL CAPTURE / COMPARE UNITS
A/D CONVERTER
– 16-CHANNEL 10-BIT
– 4.85µs CONVERSION TIME AT 40MHz CPU CLOCK
4-CHANNEL PWM UNIT
SERIAL CHANNELS
– SYNCHRONOUS / ASYNCHRONOUS SERIAL
CHANNEL
– HIGH-SPEED SYNCHRONOUS CHANNEL
PQFP144 (28 x 28 mm)
(Plastic Quad Flat Pack)
ORDER CODE:
ST10F269-Q3
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TWO CAN 2.0B INTERFACES OPERATING ON ONE
OR TWO CAN BUSSES (30 OR 2x15 MESSAGE
OBJECTS)
FAIL-SAFE PROTECTION
– PROGRAMMABLE WATCHDOG TIMER
– OSCILLATOR WATCHDOG
ON-CHIP BOOTSTRAP LOADER
CLOCK GENERATION
– ON-CHIP PLL
– DIRECT OR PRESCALED CLOCK INPUT
REAL TIME CLOCK
UP TO 111 GENERAL PURPOSE I/O LINES
– INDIVIDUALLY PROGRAMMABLE AS INPUT,
OUTPUT OR SPECIAL FUNCTION
– PROGRAMMABLE THRESHOLD (HYSTERESIS)
IDLE AND POWER DOWN MODES
SINGLE VOLTAGE SUPPLY: 5V ±10% (EMBEDDED
REGULATOR FOR 3.3 V CORE SUPPLY).
TEMPERATURE RANGE: -40 +125
°
C
144-PIN PQFP PACKAGE
32
256K Byte
Flash Memory
CPU-Core and MAC Unit
16
16
2K Byte
Internal
RAM
16
10K Byte
XRAM
PEC
W
atchdog
Oscillator
and PLL
CAN1_RXD
CAN1_TXD
CAN2_RXD
CAN2_TXD
CAN1
Interrupt Controller
CAN2
16
XT
AL1
3.3V
XT
AL2
Voltage
Regulator
Port 4 Port 1 Port 0
GPT1
ASC usart
CAPCOM2
10-Bit ADC
PWM
16
External Bus
Controller
CAPCOM1
SSC
GPT2
16
Port 2
8
16
BRG
Port 3
15
BRG
Port 7
8
Port 8
8
Port 6
8
Port 5
16
September 2013
DocID7588 Rev
3
1/160
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
ST10F269
TABLE OF CONTENTS
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5.1 -
5.2 -
5.3 -
5.3.1 -
5.3.2 -
5.3.3 -
5.3.4 -
5.3.5 -
5.3.6 -
5.3.7 -
5.4 -
5.5 -
5.5.1 -
5.5.2 -
5.5.3 -
5.6 -
5.6.1 -
5.6.2 -
5.6.3 -
5.6.4 -
5.6.5 -
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6.1 -
6.1.1 -
6.1.1.1 -
6.1.1.2 -
6.1.1.3 -
6.2 -
6.3 -
7-
7.1 -
7.2 -
INTRODUCTION ........................................................................................................
PIN DATA ...................................................................................................................
FUNCTIONAL DESCRIPTION ...................................................................................
MEMORY ORGANIZATION .......................................................................................
INTERNAL FLASH MEMORY ...................................................................................
OVERVIEW ................................................................................................................
OPERATIONAL OVERVIEW ......................................................................................
ARCHITECTURAL DESCRIPTION ............................................................................
Read Mode .................................................................................................................
Command Mode .........................................................................................................
Ready/Busy Signal .....................................................................................................
Flash Status Register .................................................................................................
Flash Protection Register ...........................................................................................
Instructions Description ..............................................................................................
Reset Processing and Initial State ..............................................................................
FLASH MEMORY CONFIGURATION ........................................................................
APPLICATION EXAMPLES .......................................................................................
Handling of Flash Addresses ......................................................................................
Basic Flash Access Control ........................................................................................
Programming Examples .............................................................................................
BOOTSTRAP LOADER ............................................................................................
Entering the Bootstrap Loader ....................................................................................
Memory Configuration After Reset .............................................................................
Loading the Startup Code ...........................................................................................
Exiting Bootstrap Loader Mode ..................................................................................
Choosing the Baud Rate for the BSL .........................................................................
CENTRAL PROCESSING UNIT (CPU) .....................................................................
MULTIPLIER-ACCUMULATOR UNIT (MAC) .............................................................
Features .....................................................................................................................
Enhanced Addressing Capabilities ..............................................................................
Multiply-Accumulate Unit .............................................................................................
Program Control ..........................................................................................................
INSTRUCTION SET SUMMARY ................................................................................
MAC COPROCESSOR SPECIFIC INSTRUCTIONS .................................................
EXTERNAL BUS CONTROLLER ..............................................................................
PROGRAMMABLE CHIP SELECT TIMING CONTROL ............................................
READY PROGRAMMABLE POLARITY .....................................................................
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ST10F269
TABLE OF CONTENTS
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8.1 -
8.2 -
8.3 -
8.4 -
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12.5.1 -
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12.7.1 -
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12.8.1 -
12.8.2 -
12.9 -
12.9.1 -
12.10 -
12.10.1 -
12.11 -
12.11.1 -
INTERRUPT SYSTEM ...............................................................................................
EXTERNAL INTERRUPTS .........................................................................................
INTERRUPT REGISTERS AND VECTORS LOCATION LIST ..................................
INTERRUPT CONTROL REGISTERS .......................................................................
EXCEPTION AND ERROR TRAPS LIST ...................................................................
CAPTURE/COMPARE (CAPCOM) UNITS ................................................................
GENERAL PURPOSE TIMER UNIT ..........................................................................
GPT1 .................................................................................................................... ......
GPT2 ..........................................................................................................................
PWM MODULE ..........................................................................................................
PARALLEL PORTS ...................................................................................................
INTRODUCTION ........................................................................................................
I/O’S SPECIAL FEATURES .......................................................................................
Open Drain Mode .......................................................................................................
Input Threshold Control ............................................................................................
Output Driver Control ................................................................................................
Alternate Port Functions .............................................................................................
PORT0 ........................................................................................................................
Alternate Functions of PORT0 ....................................................................................
PORT1 ........................................................................................................................
Alternate Functions of PORT1 ....................................................................................
PORT 2 .......................................................................................................................
Alternate Functions of Port 2 ......................................................................................
PORT 3 .......................................................................................................................
Alternate Functions of Port 3 ......................................................................................
PORT 4 .......................................................................................................................
Alternate Functions of Port 4 ......................................................................................
PORT 5 .......................................................................................................................
Alternate Functions of Port 5 ......................................................................................
Port 5 Schmitt Trigger Analog Inputs ..........................................................................
PORT 6 .......................................................................................................................
Alternate Functions of Port 6 ......................................................................................
PORT 7 .......................................................................................................................
Alternate Functions of Port 7 ......................................................................................
PORT 8 .......................................................................................................................
Alternate Functions of Port 8 ......................................................................................
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ST10F269
TABLE OF CONTENTS
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A/D CONVERTER ......................................................................................................
SERIAL CHANNELS .................................................................................................
ASYNCHRONOUS / SYNCHRONOUS SERIAL INTERFACE (ASCO) ....................
ASCO in Asynchronous Mode ....................................................................................
ASCO in Synchronous Mode ......................................................................................
HIGH SPEED SYNCHRONOUS SERIAL CHANNEL (SSC) .....................................
CAN MODULES .........................................................................................................
CAN MODULES MEMORY MAPPING ......................................................................
CAN1 .................................................................................................................. ........
CAN2 .................................................................................................................. ........
CAN BUS CONFIGURATIONS ..................................................................................
REAL TIME CLOCK ..................................................................................................
RTC REGISTERS ......................................................................................................
RTCCON: RTC Control Register ................................................................................
RTCPH & RTCPL: RTC PRESCALER Registers .......................................................
RTCDH & RTCDL: RTC DIVIDER Counters ..............................................................
RTCH & RTCL: RTC Programmable COUNTER Registers .......................................
RTCAH & RTCAL: RTC ALARM Registers ................................................................
PROGRAMMING THE RTC .......................................................................................
WATCHDOG TIMER ..................................................................................................
SYSTEM RESET ........................................................................................................
LONG HARDWARE RESET ......................................................................................
Asynchronous Reset ..................................................................................................
Synchronous Reset (RSTIN pulse > 1040TCL and RPD pin at high level) ................
Exit of Long Hardware Reset ......................................................................................
SHORT HARDWARE RESET ....................................................................................
SOFTWARE RESET ..................................................................................................
WATCHDOG TIMER RESET .....................................................................................
RSTOUT, RSTIN, BIDIRECTIONAL RESET ............................................................
RSTOUT Pin ...............................................................................................................
Bidirectional Reset ......................................................................................................
RSTIN pin ...................................................................................................................
RESET CIRCUITRY ...................................................................................................
POWER REDUCTION MODES .................................................................................
IDLE MODE ................................................................................................................
POWER DOWN MODE ..............................................................................................
Protected Power Down Mode .....................................................................................
Interruptable Power Down Mode ................................................................................
ST10F269
TABLE OF CONTENTS
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20.1 -
20.2 -
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21.1 -
21.2 -
21.3 -
21.3.1 -
21.3.2 -
21.4 -
21.4.1 -
21.4.2 -
21.4.3 -
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21.4.5 -
21.4.6 -
21.4.7 -
21.4.8 -
21.4.9 -
21.4.10 -
21.4.11 -
21.4.12 -
21.4.13 -
21.4.14 -
21.4.14.1
21.4.14.2
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23 -
SPECIAL FUNCTION REGISTER OVERVIEW .........................................................
IDENTIFICATION REGISTERS .................................................................................
SYSTEM CONFIGURATION REGISTERS ................................................................
ELECTRICAL CHARACTERISTICS .........................................................................
ABSOLUTE MAXIMUM RATINGS .............................................................................
PARAMETER INTERPRETATION .............................................................................
DC CHARACTERISTICS ...........................................................................................
A/D Converter Characteristics ....................................................................................
Conversion Timing Control .......................................................................................
AC CHARACTERISTICS ............................................................................................
Test Waveforms .......................................................................................................
Definition of Internal Timing ........................................................................................
Clock Generation Modes ............................................................................................
Prescaler Operation ....................................................................................................
Direct Drive .................................................................................................................
Oscillator Watchdog (OWD) .......................................................................................
Phase Locked Loop ....................................................................................................
External Clock Drive XTAL1 .......................................................................................
Memory Cycle Variables .............................................................................................
Multiplexed Bus ..........................................................................................................
Demultiplexed Bus ......................................................................................................
CLKOUT and READY .................................................................................................
External Bus Arbitration ..............................................................................................
High-Speed Synchronous Serial Interface (SSC) Timing ...........................................
Master Mode................................................................................................................
Slave mode..................................................................................................................
PACKAGE MECHANICAL DATA
...........................................................................
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ORDERING INFORMATION ......................................................................................
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