Datasheet
Serial EEPROM Series Standard EEPROM
WLCSP EEPROM
BU99901GUZ-W
(32Kbit)
●General
Description
2
BU99901GUZ-W series is a serial EEPROM of I C BUS interface method.
●Features
2
Completely conforming to the world standard I C BUS.
All controls available by 2 ports of serial clock (SCL) and serial data (SDA)
Other devices than EEPROM can be connected to the same port, saving microcontroller port.
1.7V to 3.6V single power source action most suitable for battery use.
FAST MODE :400kHz at 1.7V to 3.6V
Page write mode useful for initial value write at factory shipment.
Auto erase and auto end function at data rewrite.
Low current consumption
At write operation (3.3V)
: 0.6mA (Typ.)
At read operation (3.6V)
: 0.6mA (Typ.)
At standby operation (3.6V)
: 0.1µA (Typ.)
Write mistake prevention function
Write (write protect) function added
Write mistake prevention function at low voltage
Compact package
W(Typ.) x D(Typ.) x H(Max.)
: 1.76mm x 1.05mm x 0.35mm
Data rewrite up to 100,000 times
Data kept for 40 years
Noise filter built in SCL / SDA terminal
Shipment data all address FFh
●Page
write
Product number
Number of pages
●Absolute
Maximum Ratings
(Ta=25℃)
Parameter
symbol
Impressed voltage
V
CC
Permissible dissipation
Storage temperature range
Action temperature range
Terminal voltage
*1
BU99901GUZ-W
32Byte
Ratings
-0.3 to +6.5
220
-65 to +125
-40 to +85
-0.3 to Vcc+1.0
*1
Unit
V
mW
℃
℃
V
Remarks
When using at Ta=25℃ or higher 2.2mW to be reduced per 1℃.
Pd
Tstg
Topr
－
The Max value of Terminal Voltage is not over 6.5V.
●Memory
cell characteristics
(Ta=25℃, Vcc=1.7V to 3.6V)
Limits
Parameter
Min.
Typ.
*1
Number of data rewrite times
100,000
－
Data hold years
*1
*1 Not 100% TESTED
Max.
－
－
Unit
Times
Years
40
－
●Recommended
Operating Ratings
Parameter
Write(Ta=-40℃ to 85℃)
Supply Voltage
Input Voltage
Write(Ta=-40℃ to 70℃)
Read(Ta=-40℃ to 85℃)
Symbol
Vcc
V
IN
Rating
2.7 to 3.3
1.8 to 3.3
1.7 to 3.6
0 to Vcc
Unit
V
V
○Product
structure：Silicon monolithic integrated circuit
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ22111½14½001
○This
product is not designed protection against radioactive rays
1/23
TSZ02201-0R2R0G100280-1-2
4.SEP.2012 Rev.001
BU99901GUZ-W (32Kbit)
●Electrical
characteristics
Parameter
"H" Input Voltage1
"L" Input Voltage1
"H" Input Voltage2
"L" Input Voltage2
"H" Input Voltage3
"L" Input Voltage3
"L" Output Voltage1
"L" Output Voltage2
Input Leakage Current
Pull Up Resistance
Output Leakage Current
Current consumption
at action
Standby Current
●Action
timing characteristics
Parameter
SCL Frequency
Data clock "High" time
Data clock "Low" time
SDA, SCL rise time
SDA, SCL fall time
*1
*1
Datasheet
(Unless otherwise specified Ta=-40℃ to 85℃½V
CC
=1.7V to 3.6V)
Limits
Symbol
Unit
Condition
Min
Typ.
Max.
V
IH1
V
IL1
V
IH2
V
IL2
V
IH3
V
IL3
V
OL1
V
OL2
I
LI
I
LI2
I
LO
I
CC1
I
CC2
I
SB
0.7Vcc
-0.3
0.8Vcc
-0.3
0.9Vcc
-0.3
－
－
-1
6
-1
－
－
－
－
－
－
－
－
－
－
－
－
－
Vcc+1.0
0.3Vcc
Vcc+1.0
0.2Vcc
Vcc+1.0
0.1Vcc
0.4
0.2
1
14
1
4.1
mA
1.7
2.0
µA
V
V
V
V
V
V
V
V
µA
kΩ
µA
2.5V≦Vcc≦3.6V
2.5V≦Vcc≦3.6V
1.8V≦Vcc＜2.5V
1.8V≦Vcc＜2.5V
1.7V≦Vcc＜1.8V
1.7V≦Vcc＜1.8V
I
OL
=3.0mA , 2.5V≦Vcc≦3.6V (SDA)
I
OL
=0.7mA , 1.7V≦Vcc＜2.5V (SDA)
V
IN
=0 to Vcc (WP, TEST)
(SCL,SDA)
V
OUT
=0 to Vcc (SDA)
Vcc=3.3V , f
SCL
=400kHz, tWR=5ms
Byte Write, Page Write
Vcc=3.6V , f
SCL
=400kHz
Random read, Current read, Sequential read
Vcc=3.6V, SDA ,SCL=Vcc, WP=GND
(Unless otherwise specified Ta=-40℃ to 85℃½V
CC
=1.7V to 3.6V)
FAST-MODE
STANDARD-MODE
2.5V≦Vcc≦3.6V
1.7V≦Vcc≦3.6V
Symbol
Min.
Typ.
Max.
Min.
Typ.
Max.
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tPD
tDH
tSU:STO
tBUF
tWR
tI
tHD:WP
tSU:WP
tHIGH:WP
－
0.6
1.2
－
－
0.6
0.6
0
100
0.1
0.1
0.6
1.2
－
－
0
0.1
1.0
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
400
－
－
0.3
0.3
－
－
－
－
0.9
－
－
－
5
0.1
－
－
－
－
4.0
4.7
－
－
4.0
4.7
0
250
0.2
0.2
4.7
4.7
－
－
0
0.1
1.0
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
100
－
－
1.0
0.3
－
－
－
－
3.5
－
－
－
5
0.1
－
－
－
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
µs
ns
µs
µs
Start condition hold time
Start condition setup time
Input data hold time
Input data setup time
Output data delay time
Output data hold time
Stop condition data setup time
Bus release time before transfer start
Internal write cycle time
Noise removal valid period
(SDA,SCL terminal)
WP hold time
WP setup time
WP valid time
*1 Not 100% tested
●FAST-MODE
and STANDARD-MODE
FAST-MODE and STANDARD-MODE are of same actions, and mode is changed. They are distinguished by action speeds.
100kHz action is called STANDARD-MODE, and 400kHz action is called FAST-MODE. This action frequency is the
maximum action frequency, so 100kHz clock may be used in FAST-MODE. When power source voltage goes down, action
at high speed is not carried out, therefore, at Vcc=2.5V to 5.5V, 400kHz, namely, action is made in FASTMODE. (Action is
made also in STANDARD-MODE) Vcc=1.8V to 2.5V is only action in 100kHz STANDARD-MODE.
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
2/23
TSZ02201-0R2R0G100280-1-2
4.SEP.2012 Rev.001
BU99901GUZ-W (32Kbit)
●Sync
Data Input / Output Timing
tR
SCL
tF
tHIGH
Datasheet
SCL
tHD :STA
tSU :DAT
tLOW
tHD :DAT
(Input)
SDA
DATA(1)
SDA
D1
D0
ACK
DATA(n)
ACK
t WR
tBUF
SDA
tPD
tDH
WP
Stop condition
(Output)
tSU
：
WP
½
HD
：
WP
○Input
read at the rise edge of SCL
○Data
output in sync with the fall of SCL
Figure 1-(a). Sync data input / output timing
Figure 1-(d). WP timing at write execution
SCL
SCL
tSU:STA
SDA
DATA(1)
tHD:STA
tSU:STO
DATA(n)
ACK
tHIGH:WP
ACK
SDA
D1
D0
tWR
tWR
WP
START BIT
STOP BIT
Figure 1-(b). Start - stop bit timing
○At
write execution, in the area from the D0 taken clock rise of the first
DATA(1), to tWR, set WP=“LOW”.
○By
setting WP “HIGH” in the area, write can be cancelled.
When it is set WP=“HIGH” during tWR, write is forcibly ended, and data of
address under access is not guaranteed, therefore write it once again.
Figure 1-(e). WP timing at write cancels
SCL
SDA
D0
WRITE DATA(n)
ACK
t
WR
STOP
CONDITION
START
CONDITION
Figure 1-(c). Write cycle timing
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
3/23
TSZ02201-0R2R0G100280-1-2
4.SEP.2012 Rev.001
BU99901GUZ-W (32Kbit)
●Block
Diagram
Datasheet
32Kbit EEPROM array
8bit
Vcc
12bit
Adddress
decoder
12bit
Slave - word
address register
Data
register
WP
START
STOP
TEST
Control circuit
ACK
SCL
GND
High voltage
generating circuit
TEST terminal, please connect GND
Power source
voltage detection
SDA
●Pin
Configuration
(BOTTOM VIEW)
B
B1
TEST
B2
GND
A2
SCL
2
B3
V
CC
A3
WP
3
A
A1
SDA
1
●Pin
Descriptions
Land No.
B3
B2
B1
A3
A2
A1
Terminal name
V
CC
GND
TEST
WP
SCL
SDA
Input / output
－
－
Unit
Power Supply
Reference voltage of all input / output
TEST terminal, Connect GND
Write protect terminal
Serial clock input
Slave and word address, Serial data input serial data output
Input
Input
Input
Input /output
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
4/23
TSZ02201-0R2R0G100280-1-2
4.SEP.2012 Rev.001
BU99901GUZ-W (32Kbit)
●Typical
Performance Curves
(The following values are Typ. ones.)
Datasheet
Figure 2. H input voltage V
IH
1,2
(SCL,SDA,WP)
Figure 3. L input voltage V
IL
(SCL,SDA,WP)
Figure 4. L output voltage V
OL
-I
OL
(V
CC
=1.7V)
Figure 5. L output voltage V
OL
-I
OL
(V
CC
=2.5V)
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111
・
15
・
001
5/23
TSZ02201-0R2R0G100280-1-2
4.SEP.2012 Rev.001
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