(1) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer
FR4 PCB with thermal vias under the exposed pad per JESD51
standards.
(2) Available in tape and reel only. A reel contains 3,000 devices.
(3) Device is Pb-free, Halogen free, and RoHS/WEEE compliant.
(4) “x” is the code of the output voltage. See Table 1 for the code. For
example, the device number for VOUT= 1.50V is SC3102HULTRT.
(5) “x” is the code of the output voltage. See Table 1 for the code. For
example, the EVB with VOUT= 1.50V is SC3102HEVB.
PGOOD
MODE
3mm x 3mm x 0.6mm MLPQ-UT16
θ
JA
= 40°C/W
(1)
; θ
JC
= 7°C/W
NC
EN
Marking Information
Table 1: Available Output Voltages
Code
D
E
VOUT
(6)
1.10
1.20
1.50
102X
yyww
nnnn
H
Notes:
(6) Contact Semtech marketing for alternative output voltage
options.
Marking for 3mm x 3mm MLPQ-UT 16 Lead Package:
x = Code of the output voltage (Example: H for VOUT=1.50V)
yyww = Datecode (Example: 0852)
nnnn = Semtech Lot number (Example: E901)
2
SC3102
Absolute Maximum Ratings
PVIN and AVIN Supply Voltages ………………… -0.3 to 6.0V
LX Voltage
(9)
……………………
-0.3 to PVIN+0.3V, 6V Max
Recommended Operating Conditions
Supply Voltage PVIN and AVIN …………………… 2.9 to 5.5V
Maximum DC Output Current …………………………
2.0A
VOUT Voltage …………………………… -0.3 to AVIN+0.3V
CTLx pins Voltages ……………………… -0.3 to AVIN+0.3V
Peak IR Reflow Temperature …………………………. 260°C
ESD Protection Level
(8)
………………………………….
2kV
Maximum DC Output Current in Forced PSAVE Mode … 0.35A
Temperature Range …………………………… -40 to +85˚C
Input Capacitor
Output Capacitor
……………………………………… 10
μ
F
……………………… 47
μ
F (or 2 x 22
μ
F)
Output Inductor ……………………………………… 1.5
μH
Thermal Information
Thermal Resistance, Junction to Ambient
(7)
………… 40 °C/W
Thermal Resistance, Junction to Case ……………
7 °C/W
Maximum Junction Temperature …………………… +150°C
Storage Temperature Range ………………… -65 to +150 °C
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the
parameters specified in the Electrical Characteristics section is not recommended.
Notes:
(7) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
(8) Tested according to JEDEC standard JESD22-A114-B.
(9) Due to parasitic board inductance, the transient LX pin voltage at the point of measurement may appear larger than that which exists on silicon. The device is
designed to tolerate the short duration transient voltages that will appear on the LX pin due to the deadtime diode conduction, for inductor currents up to the
current limit setting of the device.
Electrical Characteristics
Unless specified: PVIN= AVIN= 5.0V, VOUT= 1.50V, C
IN
= 10μF, C
OUT
= 2 x 22μF; L= 1.5μH; -40°C≤ T
J
≤ +125 °C; Unless otherwise noted typical values are T
A
= +25 °C.
Parameter
Under-Voltage Lockout
Output Voltage Tolerance
(10)
Current Limit
Supply Current
Shutdown Current
High Side Switch Resistance
(11)
Low Side Switch Resistance
(11)
L
X
Leakage Current
(11)
Load Regulation
Oscillator Frequency
Soft-Start Charging Current
(11)
Foldback Holding Current
Symbol
UVLO
Conditions
Rising AVIN, PVIN=AVIN
Hysteresis
Min
2.70
Typ
2.80
300
Max
2.90
Units
V
mV
ΔV
OUT
I
LIMIT
I
Q
I
SHDN
R
DSON_P
R
DSON_N
I
LK(LX)
ΔV
LOAD-REG
f
OSC
I
SS
I
CL_HOLD
PVIN= AVIN= 2.9 to 5.5V; I
OUT
=0A
Peak LX current
No load, MODE= High
No load, MODE= Low
EN= AGND
I
LX
= 100mA, T
J
= 25 °C
I
LX
= -100mA, T
J
= 25 °C
PVIN= AVIN= 5.5V; LX= 0V; EN= AGND
PVIN= AVIN= 5.5V; LX= 5.0V; EN= AGND
PVIN= AVIN= 5.0V, MODE=High, I
OUT
=1mA to 2A
-1.25
2.5
3.0
12
60
1
50
35
1
-20
-1
±0.3
1.275
1.5
+5
+1.25
3.75
%
A
mA
μA
10
85
μA
mΩ
60
10
μA
%
1.725
MHz
μA
A
Average LX Current
1
3
SC3102
Electrical Characteristics (continued)
Parameter
Forced PSAVE Mode Current
Impedence of PGOOD Low
PGOOD Threshold
PGOOD Delay
EN Delay
EN Input Current
(11)
EN Input High Threshold
EN Input Low Threshold
MODE Input Current
(11)
MODE Input High Threshold
MODE Input Low Threshold
V
OUT
Over Voltage Protection
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
R
PGOOD_LO
V
PG_TH
V
PG_DLY
t
EN_DLY
I
EN
V
EN_HI
V
EN_LO
I
MODE
V
MODE_HI
V
MODE_LO
V
OVP
T
SD
T
SD_HYS
110
115
160
10
MODE= AVIN or AGND
-2.0
1.2
0.4
120
VOUT rising
Asserted
PGOOD= Low
From EN Input High to SS starts rising
EN =AVIN or AGND
-2.0
1.2
0.4
2.0
Symbol
Conditions
Maximum output current loading
Min
350
Typ
Max
Units
mA
10
90
2
20
50
2.0
Ω
%
ms
μs
μs
μA
V
V
μA
V
V
%
°C
°C
Notes:
(10) The “Output Voltage Tolerance” includes output voltage accuracy, voltage drift over temperature and line regulation.
(11) A negative current means the current flows into the pin and a positive current means the current flows out from the pin.
4
SC3102
Pin Descriptions
Pin #
1,2
3
4
Pin Name
PVIN
AGND
AVIN
Pin Function
Input supply voltage for the converter power stage.
Ground connection for the internal circuitry. AGND needs to be connected to PGND directly.
Power supply for the internal circuitry. AVIN is required to be connected to PVIN through an R-C filter of 1Ω
and 100nF.
MODE select pin. When connected to logic high, the device operates in forced PWM mode. When connected
to logic low, it operates in forced PSAVE mode at light load. The MODE pin has a 500kΩ internal pulldown re-
sistor. This resistor is switched in circuit whenever the MODE pin is “Low” or when the part is in undervoltage
lockout or disabled.
Enable pin. When connected to logic high or tied to the AVIN pin, the SC3102 is on. When connected to logic
low, the device enters shutdown and consumes less than 1μA current (typ.). The enable pin has a 500kΩ
internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is “Low” or when the part is
in undervoltage lockout.
Power good indicator. When the output voltage reaches the PGOOD threshold, this pin will be open-drain
(after the PGOOD delay), otherwise it is pulled low internally.
No connection.
Soft-Start. Connect a soft-start capacitor to program the soft-start time. There is a 5μA charging current flow-
ing out of the pin.
Output voltage sense pin.
Ground connection for converter power stage.
Switching node - connect an inductor between this pin and the output capacitor.
Thermal pad for heatsinking purposes. Connection to PGND is recommended. It is not connected internally.
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