Supports 100 MHz and 125 MHz reference clock frequencies
–
Flexible port clocking modes
•
Common clock
•
Non-common clock
•
Local port clock with SSC (spread spectrum setting) and port
reference clock input
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
1 of 35
2013 Integrated Device Technology, Inc
December 17, 2013
IDT 89HPES32NT8BG2 Datasheet
Hot-Plug and Hot Swap
–
Hot-plug controller on all ports
•
Hot-plug supported on all downstream switch ports
–
All ports support hot-plug using low-cost external I
2
C I/O
expanders
–
Configurable presence-detect supports card and cable appli-
cations
–
GPE output pin for hot-plug event notification
•
Enables SCI/SMI generation for legacy operating system
support
–
Hot-swap capable I/O
Power Management
–
Supports D0, D3hot and D3 power management states
–
Active State Power Management (ASPM)
•
Supports L0, L0s, L1, L2/L3 Ready, and L3 link states
•
Configurable L0s and L1 entry timers allow performance/
power-savings tuning
–
SerDes power savings
•
Supports low swing / half-swing SerDes operation
•
SerDes associated with unused ports are turned off
•
SerDes associated with unused lanes are placed in a low
power state
Reliability, Availability, and Serviceability (RAS)
–
ECRC support
–
AER on all ports
–
SECDED ECC protection on all internal RAMs
–
End-to-end data path parity protection
–
Checksum Serial EEPROM content protected
–
Ability to generate an interrupt (INTx or MSI) on link up/down
transitions
Initialization / Configuration
–
Supports Root (BIOS, OS, or driver), Serial EEPROM, or
SMBus switch initialization
–
Common switch configurations are supported with pin strap-
ping (no external components)
–
Supports in-system Serial EEPROM initialization/program-
ming
On-Die Temperature Sensor
–
Range of 0 to 127.5 degrees Celsius
–
Three programmable temperature thresholds with over and
under temperature threshold alarms
–
Automatic recording of maximum high or minimum low
temperature
9 General Purpose I/O
Test and Debug
–
Ability to inject AER errors simplifies in system error handling
software validation
–
On-chip link activity and status outputs available for several
ports
–
Per port link activity and status outputs available using
external I
2
C I/O expander for all remaining ports
–
Supports IEEE 1149.6 AC JTAG and IEEE 1149.1 JTAG
Standards and Compatibility
–
PCI Express Base Specification 2.1 compliant
–
Implements the following optional PCI Express features
•
Advanced Error Reporting (AER) on all ports
•
End-to-End CRC (ECRC)
•
Access Control Services (ACS)
•
Device Serial Number Enhanced Capability
•
Sub-System ID and Sub-System Vendor ID Capability
•
Internal Error Reporting
•
Multicast
•
VGA and ISA enable
•
L0s and L1 ASPM
•
ARI
Power Supplies
–
Requires three power supply voltages (1.0V, 2.5V, and 3.3V)
Packaged in a 23mm x 23mm 484-ball Flip Chip BGA with
1mm ball spacing
Product Description
With Non-Transparent Bridging functionality and innovative Switch
Partitioning feature, the PES32NT8BG2 allows true multi-host or multi-
processor communications in a single device. Integrated DMA control-
lers enable high-performance system design by off-loading data transfer
operations across memories from the processors. Each lane is capable
of 5 GT/s link speed in both directions and is fully compliant with PCI
Express Base Specification 2.1.
A non-transparent bridge (NTB) is required when two PCI Express
domains need to communicate to each other. The main function of the
NTB block is to initialize and translate addresses and device IDs to
allow data exchange across PCI Express domains. The major function-
alities of the NTB block are summarized in Table 1.
2 of 35
December 17, 2013
IDT 89HPES32NT8BG2 Datasheet
Block Diagram
8-Port Switch Core / 32 Gen2 PCI Express Lanes
Frame Buffer
Route Table
Port
Arbitration
Scheduler
Transaction Layer
Data Link Layer
Transaction Layer
Data Link Layer
Transaction Layer
Data Link Layer
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Multiplexer / Demultiplexer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
Phy
Logical
Layer
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes
SerDes SerDes
(Port 0)
(Port 2)
(Ports 4, 6, 8, 12, 16)
(Port 20)
Figure 1 PES32NT8BG2 Block Diagram
Function
NTB ports
Mapping table
entries
Mapping windows
Address translation
Number
Up to 8
Up to 64 for entire
device
Six 32-bits or three
64-bits
Direct-address and
lookup table trans-
lations
32 bits
4 inbound and out-
bound registers of
32-bits
Description
Each device can be configured to have up to 8 NTB functions and can support up to 8 CPUs/roots.
Each device can have up to 64 masters ID for address and ID translations.
Each NT port has six BARs, where each BAR opening an NT window to another domain.
Lookup-table translation divides the BAR aperture into up to 24 segments, where each segment
has independent translation programming and is associated with an entry in a look-up table.
Doorbell register is used for event signaling between domains, where an outbound doorbell bit sets
a corresponding bit at the inbound doorbell in the other domain.
Message registers allow mailbox message passing between domains -- message placed in the
inbound register will be seen at the outbound register at the other domain.
Table 1 Non-Transparent Bridge Function Summary
Doorbell registers
Message registers
SMBus Interface
The PES32NT8BG2 contains two SMBus interfaces. The slave interface provides full access to the configuration registers in the PES32NT8BG2,
allowing every configuration register in the device to be read or written by an external agent. The master interface allows the default configuration
register values of the PES32NT8BG2 to be overridden following a reset with values programmed in an external serial EEPROM. The master interface
is also used by an external Hot-Plug I/O expander.
3 of 35
December 17, 2013
IDT 89HPES32NT8BG2 Datasheet
Each of the two SMBus interfaces contain an SMBus clock pin and an SMBus data pin. In addition, the slave SMBus has the SSMBADDR2 pin. As
shown in
Figure 2,
the master and slave SMBuses may only be used in a split configuration. In the split configuration, the master and slave SMBuses
operate as two independent buses; thus, multi-master arbitration is not required. The SMBus master interface does not support SMBus arbitration. As
a result, the switch’s SMBus master must be the only master in the SMBus lines that connect to the serial EEPROM and I/O expander slaves.
Switch
Processor
SMBus
Master
...
Other
SMBus
Devices
SSMBCLK
SSMBDAT
MSMBCLK
MSMBDAT
Serial
EEPROM
Hot-Plug
I/O
Expander
Figure 2 Split SMBus Interface Configuration
Hot-Plug Interface
The PES32NT8BG2 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, the
PES32NT8BG2 utilizes an external I/O expander, such as that used on PC motherboards, connected to the SMBus master interface. Following reset
and configuration, whenever the state of a Hot-Plug output needs to be modified, the PES32NT8BG2 generates an SMBus transaction to the I/O
expander with the new value of all of the outputs. Whenever a Hot-Plug input changes, the I/O expander generates an interrupt which is received on
the IOEXPINTN input pin (alternate function of GPIO) of the PES32NT8BG2. In response to an I/O expander interrupt, the PES32NT8BG2 generates
an SMBus transaction to read the state of all of the Hot-Plug inputs from the I/O expander.
General Purpose Input/Output
The PES32NT8BG2 provides 9 General Purpose I/O (GPIO) pins that may be individually configured as general purpose inputs, general purpose
outputs, or alternate functions. All GPIO pins are shared with other on-chip functions. These alternate functions may be enabled via software, SMBus
slave interface, or serial configuration EEPROM.
4 of 35
December 17, 2013
IDT 89HPES32NT8BG2 Datasheet
Pin Description
The following tables list the functions of the pins provided on the PES32NT8BG2. Some of the functions listed may be multiplexed onto the same
pin. The active polarity of a signal is defined using a suffix. Signals ending with an “N” are defined as being active, or asserted, when at a logic zero
(low) level. All other signals (including clocks, buses, and select lines) will be interpreted as being active, or asserted, when at a logic one (high) level.
Differential signals end with a suffix “N” or “P.” The differential signal ending in “P” is the positive portion of the differential pair and the differential signal
ending in “N” is the negative portion of the differential pair.
Note:
Pin [x] of a port refers to a lane. For port 0, PE00RN[0] refers to lane 0, PE00RN[1] refers to lane 1, etc.
How can a microcontroller use 5v to control the on/off of 18v? I need to use a transistor to control the voltage I want to use is 18v, and I need to use a microcontroller to control the on/off of 18v....
In the TInent_io routine, there is a section in the tcp receiving function that parses the http GET request message of tcp if((uri[0] == '/')&& (uri[1] == 0)) [/size][/align][align=left][size=12.0pt]{...
[i=s]This post was last edited by liaoyuanhong on 2015-9-26 02:15[/i] Good evening, everyone. First of all, I wish you a happy Mid-Autumn Festival. Last time I learned how to light up the LED. So, wha...
Question: I use the firmware library to program in stm32f103 to make the TIM3 of the general timer output four PWM waves. I want to use the button to adjust the duty cycle of PWM when the program is e...
Abstract:
With the increasing complexity of smart vehicle electrical and electronic architectures, the full lifecycle management of vehicle electronic control components faces multiple challe...[Details]
1. Project Overview
1.1 Introduction
Currently, most music files are saved in MP3 format, a lossy audio compression format that cannot perfectly reproduce the original music. With the exp...[Details]
Today's security industry has entered the era of massive networking. Many enterprises, especially financial institutions, have established multi-level video surveillance networking platforms. Lever...[Details]
On August 22, Lantu Motors officially launched its Lanhai Intelligent Hybrid technology via an online livestream. This intelligent hybrid technology, which integrates a full-range 800V high-voltage...[Details]
For autonomous vehicles to safely navigate the road, they must identify far more complex objects than just traffic lights, pedestrians, and other familiar objects. Among these obstacles is a crucia...[Details]
The automotive industry in 2025 is undergoing a thorough intelligent reshuffle.
Geely wants to make changes in the field of AI cockpits: in the future, there will be no traditional smart...[Details]
Have you ever heard stories about "crazy appliances"? Think of microwaves that turn on automatically or ovens that preheat without any human input? With radios and electromagnetic interfaces ubiqui...[Details]
On August 20, Geely announced its focus on "One Cockpit". Through a unified AI OS architecture, a unified AI Agent, and a unified user ID, it will achieve an All-in-One AI cockpit, create the first...[Details]
With the growth of the Internet of Things (IoT), wearable, and portable devices, consumers are growing weary of cluttered cables and the need for frequent battery recharges. The benefits of wireles...[Details]
With the continuous development of ultrasonic technology, ultrasound has been widely used in fields such as inspection, cleaning, welding, and medical treatment, and has even found its way into tex...[Details]
As the electric vehicle industry continues to surge in today's society, while people are concerned about the appearance and interior of new energy vehicles, they are also concerned about the classi...[Details]
Pure electric vehicles have experienced rapid growth in recent years, and many consumers now consider them as a top choice when purchasing a car. But do you know how to choose a satisfactory and sa...[Details]
As automotive technology develops at an ever-increasing pace, the performance requirements for automotive internal structures, components, and accessories are becoming increasingly demanding. The d...[Details]
In industrial production, many different controllers are often used, such as those for pressure, flow, electrical parameters, temperature, and sound. However, due to the limitations of the on-site ...[Details]
According to foreign media reports, German chipmaker Infineon has recently completed the acquisition of Marvell Technology's automotive Ethernet business for a total transaction amount of US$2.5 bi...[Details]
Analog electronics
京公网安备 11010802033920号
EEWORLD
