BS338 / BS3316 / BS3332
Utopia Level 3 Slave Bridges
Device Datasheet
Version 1.0 - July 2001
Utopia Level 3
Slave/Slave Bridge
Datasheet
1
BS338 / BS3316 / BS3332
Utopia Level 3 Slave Bridges
Device Datasheet
Version 1.0 - July 2001
CONTENTS
1
2
3
4
5
6
7
INTRODUCTION ............................................................................................................................. 3
1.1
U
TOPIA
O
VERVIEW
...................................................................................................................... 3
UTOPIA SLAVE/SLAVE BRIDGE APPLICATION......................................................................... 4
UTOPIA LEVEL 3 (L3) BRIDGE CORE FEATURES ..................................................................... 5
APPLICATION................................................................................................................................. 6
CORE PINOUT ................................................................................................................................ 7
5.1
S
IGNAL DESCRIPTIONS
................................................................................................................ 8
GLOBAL SIGNAL DISTRIBUTION .............................................................................................. 12
FUNCTIONAL DESCRIPTION – UTOPIA INTERFACE .............................................................. 13
7.1
U
TOPIA
I
NTERFACE
S
INGLE
PHY T
RANSMIT
I
NTERFACE
............................................................. 13
Single Cell Transfer ....................................................................................................................... 13
Back to Back Cells Transfer .......................................................................................................... 13
7.2
U
TOPIA
I
NTERFACE
S
INGLE
PHY R
ECEIVE
I
NTERFACE
............................................................... 14
Single Cell Transfer ....................................................................................................................... 14
Back to Back Cell Transfer ............................................................................................................ 15
8
9
CORE MANAGEMENT AND ERROR HANDLING ...................................................................... 16
COMPLEXITY AND PERFORMANCE SUMMARY...................................................................... 17
9.1
9.2
10
10.1
10.2
10.3
10.4
10.5
10.6
11
12
T
IMING
P
ARAMETERS
D
EFINITION
.............................................................................................. 17
E
CLIPSE
I
MPLEMENTATION
........................................................................................................ 18
DEVICE PINOUT ....................................................................................................................... 20
S
IGNALS
O
VERVIEW
.................................................................................................................. 20
P
ACKAGES
...............................................................................................................................21
208 P
IN
PQFP (PQ208) P
INOUT
T
ABLE
(BS338, BS3316) ...................................................... 22
208 P
IN
PQFP (PQ208) D
EVICE
D
IAGRAM
............................................................................... 23
280 P
IN
FPBGA (PT280) P
INOUT
T
ABLE
.................................................................................. 24
PT280 FPGBA D
EVICE
D
IAGRAM
............................................................................................. 25
REFERENCES........................................................................................................................... 26
CONTACT.................................................................................................................................. 26
2
BS338 / BS3316 / BS3332
Utopia Level 3 Slave Bridges
Device Datasheet
Version 1.0 - July 2001
1 Introduction
1.1
Utopia Overview
The Utopia (Universal Test & Operations PHY Interface for ATM) interface is defined by the ATM
Forum to provide a standard interface between ATM devices and ATM PHY or SAR (segmentation
and Re-assembly) devices.
Higher Layers
AAL
Management
Master
Utopia
Slave
ATM
Master
Utopia
Slave
PHY
Figure 1: Utopia Reference Model
The Utopia Standard defines a full duplex bus interface with a Master/Slave paradigm. The Slave
interface responds to the requests from the Master. The Master performs PHY arbitration and
initiates data transfers to and from the Slave device.
The ATM forum has standardized the Utopia Levels 1 (L1) to 3 (L3). Each level extends the
maximum supported interface speed from OC3, 155Mbps (L1) over OC12, 622Mbps (L2) to
3.2Gbit/s (L3).
The following Table 1 gives an overview of the main differences in these three levels.
Table 1: Utopia Level Differences
Utopia Level
1
2
3
Interface Width
8 bit
8 bit, 16 bit
8 bit, 32 bit
Max. Interface Speed
25 MHz
50 MHz
104MHz
Theoretic (typical) Throughput
200Mbps (typ. OC3 155Mbps)
800Mbps (typ. OC12 622MBps)
3.2Gbps (typ. OC 48 2.5GBps)
Utopia Level 1 implements an 8-bit interface running at up to 25MHz. Level 2 adds a 16 Bit
interface and increases the speed to 50MHz. Level 3 extends the interface further by a 32 Bit
word-size and speeds up to 104MHz providing rates up to 3.2 Gbit/s over the interface.
3
BS338 / BS3316 / BS3332
Utopia Level 3 Slave Bridges
Device Datasheet
Version 1.0 - July 2001
In addition to the differences in throughput, Utopia Level 2 uses a shared bus offering to physically
share a single interface bus between one master and up to 31 slave devices (Multi-PHY or MPHY
operation). This allows the implementation of aggregation units that multiplex several slave
devices to a single Master device. The Level 1 and Level 3 are point-to-point only, whereas Level
1 has no notion of multiple slaves. Level 3 still has the notion of multiple slaves, but they must be
implemented in a single physical device connected to the Utopia Interface.
2 Utopia Slave/Slave Bridge Application
As it is not possible to connect two Master devices together, the Slave/Slave Bridge provides the
necessary interfaces to convey between two Master devices as shown in Figure 2.
Utopia
Master
Utopia
Slave
Utopia
Slave
Utopia
Master
ATM PHY Device
ATM Layer Device
Slave/Slave Bridge
Figure 2: Utopia Slave Bridge
The Bridge automatically transfers data as soon as it becomes available from one side to the
other. Internal asynchronous FIFOs enable independent clock domains for each interface.
4
BS338 / BS3316 / BS3332
Utopia Level 3 Slave Bridges
Device Datasheet
Version 1.0 - July 2001
3 Utopia Level 3 (L3) Bridge Core Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Implements two Utopia L3 Slaves providing a solution to bridge Utopia Master devices
Compliant with ATM-Forum af-phy-0136.000 (Utopia L3)
Available with 8bit (BS338), 16bit (BS3316), 32bit (BS3332) data bus widths
Meets 104MHz performance offering up to 3.2Gbps cell rate transfers (32 bit)
Single chip solution for improved system integration
Support cell level transfer mode, single PHY
Cell and clock rate decoupling with on chip FIFOs
Up to 1.5 KByte of on chip FIFO per data direction
Integrated management interface and built-in errored cell discard
ATM Cell size programmable via external pins from 16 to 128 bytes
Optional Utopia parity generation/checking enable/disable via external pin
Built in JTAG port (IEEE1149 compliant)
Simulation model available for system level verification (Contact Quicklogic or MorethanIP for
details)
Solution also available as flexible Soft-IP core, delivered with a full device modelization and
verification testbenches.
5
京公网安备 11010802033920号
EEWORLD
