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HCTS4002DMSR

Description
HCT SERIES, DUAL 4-INPUT NOR GATE, CDIP14
Categorysemiconductor    logic   
File Size128KB,9 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
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HCTS4002DMSR Overview

HCT SERIES, DUAL 4-INPUT NOR GATE, CDIP14

HCTS4002MS
August 1995
Radiation Hardened
Dual 4-Input NOR Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14
TOP VIEW
Y1 1
A1 2
B1 3
C1 4
D1 5
14 VCC
13 Y2
12 D2
11 C2
10 B2
9 A2
8 NC
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C
NC 6
to
+125
o
C
GND 7
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii
5µA at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14
TOP VIEW
Y1
A1
B1
C1
D1
NC
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
Y2
D2
C2
B2
A2
NC
Description
The Intersil HCTS4002MS is a Radiation Hardened Dual 4-Input
NOR Gate. A high on any input forces the output to a low state.
The HCTS4002MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS4002MS is supplied in a 14 lead Ceramic flatpack (K
suffix) or a SBDIP Package (D suffix).
Functional Diagram
An
Bn
Yn
Cn
Ordering Information
PART
NUMBER
HCTS4002DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
PACKAGE
14 Lead SBDIP
Dn
TRUTH TABLE
14 Lead
Ceramic
Flatpack
14 Lead SBDIP
INPUTS
An
L
Bn
L
X
H
X
X
Cn
L
X
X
H
X
Dn
L
X
X
X
H
OUTPUTS
Yn
H
L
L
L
L
HCTS4002KMSR
-55
o
C to +125
o
C
HCTS4002D/
Sample
HCTS4002K/
Sample
+25
o
C
Sample
H
X
+25
o
C
Sample
14 Lead
Ceramic
Flatpack
Die
X
X
HCTS4002HMSR
+25
o
C
Die
NOTE: L = Logic Level Low, H = Logic level High,
X = Don’t Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
Spec Number
File Number
718
518632
3075.1

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HCTS4002DMSR HCTS4002D HCTS4002HMSR HCTS4002K HCTS4002KMSR HCTS4002MS
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