HCTS574MS
August 1995
Radiation Hardened Octal D-Type
Flip-Flop, Three-State, Positive Edge Triggered
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
Features
•
•
•
•
•
•
•
•
•
•
•
•
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-
Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver O11utputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5µA at VOL, VOH
GND 10
•
Description
The Intersil HCTS574MS is a Radiation Hardened non-inverting
octal D-type, positive edge triggered flip-flop with three-stateable
outputs. The HCTS574MS utilizes advanced CMOS/SOS
technology. The eight flip-flops enter data into their registers on
the LOW-to-HIGH transition of the clock (CP). Data is also
transferred to the outputs during this transition. The output
enable (OE) controls the three-state outputs and is independent
of the register operation. When the output enable is high, the
outputs are in the high impedance state.
The HCTS574MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS574MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
OE
D0
D1
D2
Q3
Q4
D5
D6
Q7
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Ordering Information
PART NUMBER
HCTS574DMSR
HCTS574KMSR
HCTS574D/Sample
HCTS574K/Sample
HCTS574HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
694
518629
2359.2
HCTS574MS
Functional Diagram
1 OF 8
D
COMMON CONTROLS
CP
FF
D
CP
Q
CE
Q
OE
TRUTH TABLE
INPUTS
OE
L
L
L
L
H
L
H
X
CP
Dn
H
L
X
X
X
OUTPUTS
Qn
H
L
Q0
Q0
Z
H = High Level, L = Low Level, X = Immaterial, Z = High Impedance
= Transition from Low to High Level
Q0 = The level of Q before the indicated input conditions were established
Spec Number
695
518629
Specifications HCTS574MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
o
C/W
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72
24
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 107
28
o
C/W
Maximum Package Power Dissipation at +125
o
C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Rise and Fall Times at 4.5V VCC(TR, TF) . . . . . . . . . . . 500ns Max.
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = 50µA, VIL = 0.8V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
7.2
6.0
-7.2
-6.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
±1
±50
-
µA
µA
µA
µA
-
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or
VCC, VCC = 5.5V
1
2, 3
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages reference to device GND.
2. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
696
518629
Specifications HCTS574MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
Enable to Ouptput
TPZL
VCC = 4.5V
9
10, 11
TPZH
VCC = 4.5V
9
10, 11
Disable to Output
TPLZ,
TPHZ
VCC = 4.5V
9
10, 11
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
MAX
29
36
32
39
27
32
23
28
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
Clock to Q
SYMBOL
TPLH,
TPHL
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, FQ = 1MHz
NOTES
1
1
Input Capacitance
CIN
VCC = 5.0V, FQ = 1MHz
1
1
Output Transition
Time
TTHL
TTLH
VCC = 4.5V
1
1
Max Operating
Frequency
FMAX
VCC = 4.5V
1
1
Setup Time Data to
Clock
TSU
VCC = 4.5V
1
1
Hold Time Data to
Clock
TH
VCC = 4.5V
1
1
Pulse Width Clocks
TW
VCC = 4.5V
1
1
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
-
-
-
-
12
18
5
5
16
24
MAX
39
57
10
10
12
18
30
20
-
-
-
-
-
-
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
Spec Number
697
518629
Specifications HCTS574MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
Quiescent Current
Output Current (Sink)
SYMBOL
ICC
IOL
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V or 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
VCC = 4.5V or 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
VCC = 5.5V, VIN = VCC or GND
Applied Voltage = 0V or VCC, VCC = 5.5V
TEMPERATURE
+25
o
C
+25
o
C
MIN
-
6.0
MAX
0.75
-
UNITS
mA
mA
Output Current
(Source)
Output Voltage Low
IOH
+25
o
C
-6.0
-
mA
VOL
+25
o
C
-
0.1
V
Output Voltage High
VOH
+25
o
C
VCC
-0.1
-
-
-
V
Input Leakage Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
Clock to Q
IIN
IOZ
+25
o
C
+25
o
C
±5
±50
µA
µA
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
VCC = 4.5V
+25
o
C
-
-
-
TPLH,
TPHL
TPZL
TPZH
+25
o
C
2
36
ns
Enable to Output
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
+25
o
C
+25
o
C
+25
o
C
2
2
2
39
32
28
ns
ns
ns
Disable to Output
NOTES:
TPLZ
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
5
PARAMETER
ICC
IOL/IOH
IOZL/IOZH
DELTA LIMIT
12µA
-15% of 0 Hour
±200nA
Spec Number
698
518629
Embedded System
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