MH64S72QJA-7 datasheet, PDF - EEWORLD Datasheet

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MH64S72QJA-7: Description4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM; Categorystorage storage; File Size1MB，56 Pages; ManufacturerMitsubishi; Websitehttp://www.mitsubishielectric.com/semiconductors/

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MH64S72QJA-7 Overview

4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

MH64S72QJA-7 Parametric

Parameter Name	Attribute value
Maker	Mitsubishi
Parts packaging code	DIMM
package instruction	DIMM, DIMM168
Contacts	168
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	6 ns
Maximum clock frequency (fCLK)	100 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N168
memory density	4831838208 bi
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	168
word count	67108864 words
character code	64000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM168
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	4096
Maximum standby current	0.082 A
Maximum slew rate	4.229 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL

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MITSUBISHI LSIs

MH64S72QJA -7,-8

4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

PRELIMINARY

Some of contents are subject to change w ithout notice.

DESCRIPTION

The MH64S72QJA is 67108864 - word x 72-bit

Sy nchronous DRAM stacked structural module. This

consist of thirty -six industry s t andard 32M x 4

Sy nchronous DRAMs in TSOP.

The stacked structure of TSOP on a card edge dual in-

line package prov ides any application where high

densities and large of quantities memory are required.

This is a socket-ty pe memory m odule ,suitable f or

easy interchange or addition of module.

85pin

1pin

FEATURES

Type name

Max.

Frequency

CLK

Access Time

[latch mode]

(CL = 4)

CLK

Access Time

[buffer mode]

(CL = 3)

94pin

95pin

10pin

11pin

MH64S72QJA-7

MH64S72QJA-8

100MHz

6ns

Utilizes industry standard 32M X 4 Synchronous DRAMs in

TSOP package , industry standard Resister in TSSOP package ,

and industry standard PLL in TSSOP package.

Single 3.3V +/- 0.3V power supply

LVTTL Interface

4096 refresh cycles every 64ms

124pin

125pin

40pin

41pin

APPLICATION

Main memory unit for computers, Microcomputer memory.

168pin

84pin

MIT-DS-0332-0.0

MITSUBISHI

ELECTRIC

16/Jun./1999

MH64S72QJA-7 Related Products

	MH64S72QJA-7	MH64S72QJA-8
Description	4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM	4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
Maker	Mitsubishi	Mitsubishi
Parts packaging code	DIMM	DIMM
package instruction	DIMM, DIMM168	DIMM, DIMM168
Contacts	168	168
Reach Compliance Code	unknow	unknow
ECCN code	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	6 ns	6 ns
Maximum clock frequency (fCLK)	100 MHz	100 MHz
I/O type	COMMON	COMMON
JESD-30 code	R-XDMA-N168	R-XDMA-N168
memory density	4831838208 bi	4831838208 bi
Memory IC Type	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE
memory width	72	72
Number of functions	1	1
Number of ports	1	1
Number of terminals	168	168
word count	67108864 words	67108864 words
character code	64000000	64000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C
organize	64MX72	64MX72
Output characteristics	3-STATE	3-STATE
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM
Encapsulate equivalent code	DIMM168	DIMM168
Package shape	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
power supply	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified
refresh cycle	4096	4096
Maximum standby current	0.082 A	0.082 A
Maximum slew rate	4.229 mA	4.229 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL

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