MCP601/602/603/604
2.7V to 5.5V Single Supply CMOS Op Amps
FEATURES
•
•
•
•
•
•
•
•
•
Specifications rated from 2.7V to 5.5V supplies
Rail-to-rail swing at output
Common-mode input swing below ground
2.8MHz GBWP
Unity gain stable
Low power I
DD
= 325µA max
Chip Select capability with MCP603
Industrial temperature range (-40°C to 85°C)
Available in single, dual and quad
ates with a single supply voltage that can be as low as
2.7V, while drawing less than 325µA of quiescent cur-
rent. In addition, the common-mode input voltage
range goes 0.3V below ground, making these amplifi-
ers ideal for single supply operation.
These devices are appropriate for low-power battery
operated circuits due to the low quiescent current, for
A/D Converter driver amplifiers because of their wide
bandwidth, or for anti-aliasing filters by virtue of their
low input bias current.
The MCP601, MCP602 and MCP603 are available in
standard 8-lead PDIP, SOIC and TSSOP packages.
The MCP601 is also available in the SOT23-5 pack-
age. The quad MCP604 is offered in 14-lead PDIP,
SOIC and TSSOP packages. PDIP and SOIC pack-
ages are fully specified from -40°C to +85°C with power
supplies from 2.7V to 5.5V.
APPLICATIONS
•
•
•
•
•
•
•
Portable Equipment
A/D Converter Driver
Photodiode Pre-amps
Analog Filters
Data Acquisition
Notebooks and PDAs
Sensor Interface
TYPICAL APPLICATION
AVAILABLE TOOLS
• Spice Macromodels (at www.microchip.com)
•
FilterLab™
Software (at www.microchip.com)
2000 Microchip Technology Inc.
V
IN
-IN
V
DD
MCP60X
+IN
V
REF
Low Input Bias
Current Over
Temperature
V
SS
V
OUT
OUT
DESCRIPTION
The Microchip Technology Inc. MCP601/602/603/604
family of low power operational amplifiers are offered in
single (MCP601), single with a Chip Select pin feature
(MCP603), dual (MCP602) and quad (MCP604) config-
urations. These operational amplifiers (op amps) utilize
an advanced CMOS technology, which provides low
bias current, high speed operation, high open-loop gain
and rail-to-rail output swing. This product offering oper-
Rail-to-Rail
Output Swing
2nd Order Low Pass Filter
PACKAGES
MCP601
PDIP, SOIC, TSSOP
NC 1
-IN 2
+IN 3
V
SS
4
8 NC
OUT 1
V
SS
2
+IN 3
MCP601
SOT23-5
MCP603
PDIP, SOIC, TSSOP
NC 1
5 V
DD
8 CS
MCP602
PDIP, SOIC, TSSOP
OUTA 1
-INA 2
+INA 3
V
SS
4
8 V
DD
MCP604
PDIP, SOIC, TSSOP
OUTA 1
14 OUTD
-
+
7 V
DD
6 OUT
5 NC
+
-
-IN 2
+IN 3
V
SS
4
-
+
7 V
DD
6 OUT
5 NC
-
+
+
-
B
A
7 OUTB -INA 2
6 -INB
5 +INB
+INA 3
V
DD
4
+INB 5
-INB 6
OUTB 7
-
A
+
+
D
-
13 -IND
12 +IND
11 V
SS
10 +INC
4 -IN
-
B
+
+
C
-
9 -INC
8 OUTC
2000 Microchip Technology Inc.
DS21314D-page 1
MCP601/602/603/604
1.0
1.1
ELECTRICAL
CHARACTERISTICS
Maximum Ratings*
PIN FUNCTION TABLE
NAME
+IN, +INA, +INB, +INC, +IND
-IN, -INA, -INB, -INC, -IND
V
DD
V
SS
FUNCTION
Non-inverting Input
Terminals
Inverting Input Terminals
Positive Power Supply
Negative Power Supply
V
DD
..................................................................................7.0V
All inputs and outputs w.r.t. ............. V
SS
-0.3V to V
DD
+0.3V
Difference Input voltage ....................................... |V
DD
- V
SS
|
Output Short Circuit Current ..................................continuous
Current at Input Pin .......................................................±2mA
Current at Output and Supply Pins .............................±30mA
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-55°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD Tolerance .................................3KV Human Body Model
*Notice:
Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operational listings
of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
OUT, OUTA, OUTB, OUTC, OUTD Output Terminals
CS
NC
Chip Select
No internal connection
to IC
DC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for V
DD
= +2.7V to +5.5V, V
SS
= GND, T
A
= 25 °C, V
CM
= V
DD
/2, R
L
= 100k
Ω
to
V
DD
/2, and V
OUT
~ V
DD
/2
PARAMETERS
INPUT OFFSET VOLTAGE
Input Offset Voltage
Over Temperature
(1)
SYMBOL
V
OS
V
OS
dV
OS
/dT
PSRR
I
B
I
B
I
OS
Z
CM
Z
DIFF
V
CM
CMRR
MIN.
-2
-3
—
—
—
—
—
—
—
V
SS
−
0.3
75
TYP.
MAX.
+2
+3
UNITS
mV
mV
CONDITIONS
T
A
= -40°C to +85°C
T
A
= -40°C to +85°C
for V
DD
= 2.7V to 5.5V
Drift with Temperature
Power Supply Rejection
INPUT CURRENT AND IMPEDANCE
Input Bias Current
Over Temperature
(2)
±2.5
40
1
20
1
10
13
||6
10
13
||3
—
90
—
100
—
60
—
—
—
V
DD
−
1.2
—
µ
V/°C
µ
V/V
pA
pA
pA
T
A
= -40°C to +85°C
Input Offset Bias Current
Common Mode Input Impedance
Differential Input Impedance
COMMON MODE
Common-Mode Input Range
Common-Mode Rejection Ratio
OPEN LOOP GAIN
DC Open Loop Gain
Ω
||pF
Ω
||pF
V
dB
V
DD
= 5V,
V
CM
= -0.3 to 3.8V
R
L
= 25k
Ω
to V
DD
/2,
50mV < V
OUT
<
(V
DD
−
50 mV)
R
L
= 5k
Ω
to V
DD
/2,
100mV < V
OUT
<
(V
DD
−
100mV)
R
L
= 25k
Ω
to V
DD
/2
R
L
= 5k
Ω
to V
DD
/2
R
L
= 25k
Ω
to V
DD
/2,
A
OL
≥
100dB
R
L
= 5k
Ω
to V
DD
/2,
A
OL
≥
95dB
V
OUT
= 2.5V,
V
DD
= 5V
A
OL
100
115
—
dB
DC Open Loop Gain
A
OL
95
110
—
dB
OUTPUT
Low Level/High Level Output Swing
Linear Region Maximum Output
Voltage Swing
V
OL
, V
OH
V
OL
, V
OH
V
OUT
V
OUT
V
SS
+ 0.015
V
SS
+ 0.045
V
SS
+ 0.050
V
SS
+ 0.100
—
—
—
—
20
V
DD
−
0.020
V
DD
−
0.060
V
DD
−
0.050
V
DD
−
0.100
—
V
V
V
V
mA
Output Short Circuit Current
POWER SUPPLY
Supply Voltage
Quiescent Current Per Amp
I
SC
V
DD
I
Q
2.7
—
230
5.5
325
V
µ
A
I
L
= 0
Note 1:
Max. and Min. specified for PDIP and SOIC packages only. Typical refers to all other packages
Note 2:
Max. and Min. specified for PDIP, SOIC, and TSSOP packages only. Typical refers to all packages.
DS21314D-page 2
2000 Microchip Technology Inc.
MCP601/602/603/604
AC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for V
DD
= +2.7V to +5.5V, V
SS
= GND, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 100k
Ω
to
V
DD
/2, and V
OUT
~ V
DD
/2
PARAMETERS
Gain Bandwidth Product
Phase Margin
Slew Rate
Setting Time to 0.01%
SYMBOL
GBWP
MIN.
—
—
—
—
TYP.
2.8
50
2.3
4.5
—
—
—
MAX.
UNITS
MHz
degrees
V/
µ
s
CONDITIONS
V
DD
= 5V
C
L
= 50pF, V
DD
= 5V
G = +1V/V, V
DD
= 5V
for
∆
V
OUT
= 3.8V
STEP
,
C
L
= 50pF, V
DD
= 5V,
G = +1V/V
Θ
m
SR
µ
s
NOISE
Input Voltage Noise
Input Voltage Noise Density
Input Current Noise Density
e
n
e
n
i
n
—
—
—
7
29
0.6
—
—
—
µ
V
P-P
nV/ Hz
fA/ Hz
f = 0.1Hz to 10Hz
f = 1kHz
f = 1kHz
SPECIFICATIONS FOR MCP603 CHIP SELECT FEATURE
Unless otherwise indicated, all limits are specified for V
DD
= +2.7V to +5.5V, V
SS
= GND, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 100k
Ω
to
V
DD
/2, and V
OUT
~ V
DD
/2
PARAMETERS
CS LOW SPECIFICATIONS
CS Logic Threshold, Low
CS Input Current, Low
Amplifier Output Leakage, CS High
CS HIGH SPECIFICATIONS
CS Logic Threshold, High
CS Input High, Shutdown CS Pin
Current
CS Input High, Shutdown GND
Current
DYNAMIC SPECIFICATIONS
CS Low to Amplifier Output High
Turn-on Time
CS High to Amplifier Output High Z
CS Threshold Hysteresis
t
ON
t
OFF
—
—
—
3.1
100
0.3
10
—
—
V
IH
I
CSH
I
Q
0.8 V
DD
—
—
0.51 V
DD
0.7
0.7
V
DD
2.0
2.0
V
For entire V
DD
range
CS = V
DD
CS = V
DD
V
IL
I
CSL
V
SS
-1.0
—
0.42 V
DD
—
1
0.2 V
DD
—
—
V
For entire V
DD
range
CS = 0.2V
DD
SYMBOL
MIN.
TYP.
MAX.
UNITS
CONDITIONS
µ
A
nA
µ
A
µ
A
µ
s
ns
V
CS low
≤
0.2V
DD
CS high
≥
0.8V
DD
, No
Load
TEMPERATURE SPECIFICATIONS
Unless otherwise indicated, all limits are specified for V
DD
= +2.7V to +5.5V, V
SS
= GND
PARAMETERS
TEMPERATURE RANGE
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
THERMAL PACKAGE RESISTANCE
Thermal Resistance, 5L-SOT23-5
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-TSSOP
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
T
A
T
A
T
A
-40
-40
-65
—
—
—
+85
+85
+150
°C
°C
°C
SYMBOL
MIN.
TYP.
MAX.
UNITS
CONDITIONS
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
—
—
—
—
—
—
—
256
85
163
124
70
120
100
—
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
2000 Microchip Technology Inc.
DS21314D-page 3
MCP601/602/603/604
2.0
TYPICAL PERFORMANCE CURVES
Note:
Unless otherwise indicated, V
DD
= +2.7V to +5.5V, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 25kΩ to V
DD
/2 and V
OUT
~ V
DD
/2
260
I
L
= 0
Quiescent Current per Amplifier (
µ
A)
240
220
200
180
160
140
120
100
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Power Supply, V
DD
(V)
120
100
Open Loop Gain (dB)
80
60
40
20
0
-20
-40
-60
0.1
0
10
10
Gain
100
50
0
-50
-100
Phase
-150
-200
1K
100K
1000
100000
Frequency (Hz)
-250
10M
10000000
FIGURE 2-1:
Frequency
Open Loop Gain, Phase Margin vs.
Phase Margin (degrees)
C
L
= 50pF,
R
L
= 100kΩ
V
DD
= 5V
200
150
FIGURE 2-4:
Quiescent Current vs. Power Supply
3.5
High-to-Low
Transition
C
L
=50pF,
R
L
=100kΩ,
V
DD
=5V
Quiescent Current per Amplifier (µA)
300
280
260
240
220
200
180
160
140
120
100
-40
-20
0
20
40
60
80
Temperature (°C)
V
DD
= 2.7V
V
DD
= 5.5V
I
L
=0
3
Slew Rate (V/
µ
s)
2.5
Low-to-High
Transition
2
1.5
1
-40
-20
0
20
40
60
80
Temperature (°C)
FIGURE 2-2:
Slew Rate vs. Temperature
FIGURE 2-5:
85
Quiescent Current vs. Temperature
4.5
4
Gain Bandwidth Product (MHz)
3.5
3
2.5
2
1.5
1
0.5
0
-40
-20
0
20
40
60
80
Temperature (°C)
Phase
C
L
= 55pF
Gain Bandwidth Product
10000
Input Voltage Noise Density (nV/
√Hz)
R
L
= 10kΩ
80
Phase Margin (degrees)
75
70
65
60
55
50
45
40
10
0.1
1
10
100
1k
10k
1000
100
100k
1M
Frequency (Hz)
FIGURE 2-3:
Temperature
Gain Bandwidth Product vs.
FIGURE 2-6:
Frequency
Input
Voltage
Noise
Density
vs.
DS21314D-page 4
2000 Microchip Technology Inc.
MCP601/602/603/604
Note:
Unless otherwise indicated, V
DD
= +2.7V to +5.5V, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 25kΩ to V
DD
/2 and V
OUT
~ V
DD
/2
40
35
Number of Occuracnes
30
25
20
15
10
5
0
-2.00
0.50
0.75
1.00
-1.50
-1.25
-1.00
-0.75
-1.75
-0.25
1.25
0.00
0.25
1.50
1.75
-0.50
2.00
60
V
DD
= 5.5V
R
L
= 100kΩ
Sample Size = 203 op amp
Number of Occurances
50
40
30
20
10
0
0
1
2
3
V
DD
= 5.5V
R
L
= 100kΩ
Sample Size = 203
Temperature Range = -40°C to +85
°C
4
5
6
7
8
Offset Voltage (mV)
Change in Offset Voltage with Temperature (µV/
°
C)
FIGURE 2-7:
Offset Voltage
Occurrences with V
DD
= 5.5V
40
35
Number of Occurances
30
25
20
15
10
5
0
0.00
0.25
vs.
Number
of
FIGURE 2-10:
Offset Voltage Drift vs. Number of
Occurrences with V
DD
= 5.5V
60
V
DD
= 2.7V
R
L
= 100kΩ
Sample Size = 203 op amp
Number of Occurances
50
V
DD
= 2.7V
R
L
= 100kΩ
Sample Size = 203
Temperature Range = -40°C to +85
°C
40
30
20
10
0.50
0.75
1.00
1.25
1.50
1.75
-1.75
-1.50
-1.25
-1.00
-0.75
-0.50
-2.00
-0.25
2.00
0
0
1
2
3
4
5
6
7
8
Change in Offset Voltage with Temperature (µV/°C)
Offset Voltage (mV)
FIGURE 2-8:
Offset Voltage
Occurrences with V
DD
= 2.7V.
vs.
Number
of
FIGURE 2-11:
Offset Voltage Drift vs. Number of
Occurrences with V
DD
= 2.7V
400
300
Offset Voltage (µV)
200
100
0
-100
-200
-300
-400
-500
-40
-20
0
20
40
V
DD
= 5.5V
V
DD
= 2.7V
R
L
= 100kΩ
Common Mode Rejection Ratio, Power Supply Rejection
Ratio (dB)
500
100
CMRR
V
DD
= 2.7V
V
CM
= -0.3V to 1.5V
PSRR,
V
DD
= 2.7V to 5.5V
90
CMRR
V
DD
= 5.5V
V
CM
= -0.3V to 4.3V
95
85
80
60
80
75
-40
-20
0
20
Temperature (° C)
40
60
80
Temperature (°C)
FIGURE 2-9:
Normalized Offset Voltage vs. Temper-
ature with V
DD
= 2.7V
FIGURE 2-12:
Common-Mode Rejection Ratio,
Power Supply Rejection Ratio vs. Temperature
2000 Microchip Technology Inc.
DS21314D-page 5
京公网安备 11010802033920号
EEWORLD
