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MCM6946TS12R

Description
512K x 9 Bit Fast Static Random Access Memory
Categorystorage    storage   
File Size109KB,11 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

MCM6946TS12R Overview

512K x 9 Bit Fast Static Random Access Memory

MCM6946TS12R Parametric

Parameter NameAttribute value
MakerMotorola ( NXP )
Parts packaging codeTSOP2
package instructionTSOP2,
Contacts44
Reach Compliance Codeunknow
ECCN code3A991.B.2.A
Maximum access time12 ns
Other featuresTTL COMPATIBLE INPUTS/OUTPUTS
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length18.41 mm
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals44
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyBICMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
width10.16 mm
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM6946/D
Advance Information
MCM6946
512K x 8 Bit Static Random
Access Memory
The MCM6946 is a 4,194,304–bit static random access memory organized as
524,288 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes.
The MCM6946 is equipped with chip enable (E) and output enable (G) pins,
allowing for greater system flexibility and eliminating bus contention problems.
Either input, when high, will force the outputs into high–impedance.
The MCM6946 is available in a 400 mil, 36–lead surface–mount SOJ package.
Single 3.3 V – 5%, + 10% Power Supply
Fast Access Time: 8/10/12/15 ns
Equal Address and Chip Enable Access Time
All Inputs and Outputs are TTL Compatible
Three–State Outputs
Power Operation: 195/185 / 180 / 175 mA Maximum, Active AC
Available in TSOP or SOJ Packages
YJ PACKAGE
400 MIL SOJ
CASE 893–02
TS PACKAGE
44–LEAD
TSOP TYPE II
CASE 924A–02
PIN NAMES
A0 – A18 . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . . . . . Data Input/Output
NC . . . . . . . . . . . . . . . . . . . . No Connection
VCC . . . . . . . . . . . . . + 3.3 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . Ground
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REV 5
3/31/98
©
Motorola, Inc. 1998
MOTOROLA FAST SRAM
MCM6946
1

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