DPA422-426
DPA-Switch
Family
Highly Integrated DC-DC Converter ICs for
Power over Ethernet & Telecom Applications
Product Highlights
Highly Integrated Solution
•
Eliminates up to 50 external components–saves space, cost
•
Integrates 220 V high frequency MOSFET, PWM control
•
Lower cost plastic DIP surface mount (G package) and
through-hole (P package) options for designs ≤35 W
•
Thermally efficient TO-263-7C (R package) option for high
power applications
Superior Performance and Flexibility
•
Eliminates all external current sensing circuitry
•
Built-in auto-restart for output overload/open loop protection
•
Pin selectable 300/400 kHz fixed frequency
•
Wide input (line) voltage range: 16-75 VDC
•
Externally programmable current limit
•
Source connected tab reduces EMI
•
Line undervoltage (UV) detection: meets ETSI standards
•
Line overvoltage (OV) shutdown protection
•
UV/OV limits gate drive voltage for synchronous rectification
•
Fully integrated soft-start for minimum stress/overshoot
•
Supports forward or flyback topology
•
Cycle skipping: regulation to zero load without pre-load
•
Hysteretic thermal shutdown for automatic fault recovery
•
RoHS compliant P and G package options
EcoSmart
™
– Energy Efficient
•
Extremely low consumption at no-load
•
Cycle skipping at light load for high standby efficiency
Applications
•
PoE applications, VoIP phones, WLAN, security cameras
•
Telco central office equipment: xDSL, ISDN, PABX
•
Distributed power architectures (24 V/48 V bus)
•
Industrial controls
VO
SENSE
CIRCUIT
VIN
DPA-Switch
D
RESET/
CLAMP
CIRCUIT
L
CONTROL
C
S
X
F
PI-2770-032002
Figure 1.
Typical Forward Converter Application.
Output Power Table
36-75 VDC Input Range (Forward)
2
Total Device
Dissipation
3
Product
DPA422
7,8
DPA423
DPA424
DPA425
DPA426
5
Total Device
Dissipation
3
Product
4
DPA422
7,8
DPA423
DPA424
DPA425
6.5 W
9W
10 W
-
6
4
0.5 W
7.5 W
12 W
16 W
23 W
25 W
1W
10 W
16 W
23 W
32 W
35 W
2.5 W
-
-
35 W
50 W
55 W
4W
-
-
-
62 W
70 W
2
6W
-
-
-
-
83 W
Max
Power
Output
1
10 W
18 W
35 W
70 W
100 W
36-75 VDC Input Range (Flyback)
0.5 W
0.75 W
9.0 W
13 W
14.5 W
-
6
1W
-
-
18 W
-
6
1.5 W
-
-
24 W
25.5 W
Max
Power
Output
1
9.0 W
13 W
26 W
52 W
Description
The DPA-Switch™ IC family is a highly integrated solution for
DC-DC conversion applications with 16-75 VDC input.
DPA-Switch uses the same proven topology as TOPSwitch™,
cost effectively integrating a power MOSFET, PWM control, fault
protection and other control circuitry onto a single CMOS chip.
High performance features are enabled with three user
configurable pins. Hysteretic thermal shutdown is also provided.
In addition, all critical parameters (i.e. current limit, frequency,
PWM gain) have tight temperature and absolute tolerance, to
simplify design and reduce system cost.
Table 1. Output Power Table.
Notes:
1. Maximum output power is limited by device internal current limit.
2. See Applications Considerations section for complete description of assump-
tions, and for output powers with other input voltage ranges.
3. For device dissipation of 1.5 W or below, use P or G packages. Device
dissipation above 1.5 W is possible with R package.
4. Packages: P: DIP-8, G: SMD-8, R: TO-263-7C. For lead-free package options,
see Part Ordering Information.
5. Available in R package only.
6. Due to higher switching losses, the DPA425 may not deliver additional power
compared to a smaller device.
7. Available in P and G package only.
8. DPA422 not recommended for new designs, use DPA423 instead.
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June 2015
This Product is Covered by Patents and/or Pending Patent Applications.
DPA422-426
Section List
Functional Block Diagram
....................................................................................................................................... 3
Pin Functional Description
...................................................................................................................................... 3
DPA-Switch Family Functional Description
............................................................................................................ 4
CONTROL (C) Pin Operation .................................................................................................................................... 4
Oscillator and Switching Frequency.......................................................................................................................... 5
Pulse Width Modulator & Maximum Duty Cycle ........................................................................................................ 5
Minimum Duty Cycle and Cycle Skipping ................................................................................................................. 6
Error Amplifier .......................................................................................................................................................... 6
On-chip Current Limit with External Programmability ................................................................................................ 6
Line Undervoltage Detection (UV) ............................................................................................................................. 6
Line Overvoltage Shutdown (OV) .............................................................................................................................. 6
Line Feed-Forward with DC
MAX
Reduction ................................................................................................................ 6
Remote ON/OFF ...................................................................................................................................................... 7
Synchronization........................................................................................................................................................ 7
Soft-Start ................................................................................................................................................................. 8
Shutdown/Auto-Restart ........................................................................................................................................... 8
Hysteretic Over-Temperature Protection ................................................................................................................... 8
Bandgap Reference ................................................................................................................................................. 8
High-Voltage Bias Current Source ............................................................................................................................ 8
Using Feature Pins
..................................................................................................................................................... 8
FREQUENCY (F) Pin Operation ................................................................................................................................ 8
LINE-SENSE (L) Pin Operation ................................................................................................................................. 9
EXTERNAL CURRENT LIMIT (X) Pin Operation ......................................................................................................... 9
Typical Uses of FREQUENCY (F) Pin
...................................................................................................................... 11
Typical Uses of LINE-SENSE (L) and EXTERNAL CURRENT LIMIT (X) Pins
....................................................... 11
Application Examples
.............................................................................................................................................. 14
Key Application Considerations
.............................................................................................................................. 16
DPA-Switch Design Considerations ........................................................................................................................ 16
DPA-Switch Layout Considerations ........................................................................................................................ 18
Quick Design Checklist .......................................................................................................................................... 19
Design Tools .......................................................................................................................................................... 19
Product Specifications and Test Conditions
......................................................................................................... 20
Typical Performance Characteristics
.................................................................................................................. 27
Package Outlines
.................................................................................................................................................... 31
Part Ordering Information
....................................................................................................................................... 32
2
Rev. U 06/15
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DPA422-426
VC
CONTROL (C)
0
DRAIN (D)
INTERNAL
SUPPLY
ZC
1
SHUNT REGULATOR/
ERROR AMPLIFIER
-
+
+
5.8 V
4.8 V
-
SOFT START
5.8 V
IFB
CURRENT
LIMIT
ADJUST
VI
(LIMIT)
SOFT
START
ON/OFF
INTERNAL UV
COMPARATOR
÷
8
SHUTDOWN/
AUTO-RESTART
-
+
VBG + VT
EXTERNAL
CURRENT LIMIT (X)
STOP LOGIC
CURRENT LIMIT
COMPARATOR
LINE-SENSE (L)
VBG
1V
STOP SOFT-
START
DMAX
DCMAX
CLOCK
300/400 kHz
SAW
HYSTERETIC
THERMAL
SHUTDOWN
OV/UV
CONTROLLED
TURN-ON
GATE DRIVER
LINE
SENSE
DCMAX
-
+
S
R
Q
FREQUENCY (F)
OSCILLATOR
LEADING
EDGE
BLANKING
PWM
COMPARATOR
RE
CYCLE
SKIPPING
SOURCE (S)
PI-2760-070501
Figure 2.
Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
High-voltage power MOSFET drain output. The internal startup
bias current is drawn from this pin through a switched high-
voltage current source. Internal current limit sense point for
drain current.
CONTROL (C) Pin:
Error amplifier and feedback current input pin for duty cycle
control. Internal shunt regulator connection to provide internal
bias current during normal operation. It is also used as the
connection point for the supply bypass and auto-restart/
compensation capacitor.
LINE-SENSE (L) Pin:
Input pin for overvoltage (OV), undervoltage (UV) lock out, line
feed-forward with the maximum duty cycle (DC
MAX
) reduction,
remote ON/OFF and synchronization. A connection to
SOURCE pin disables all functions on this pin.
EXTERNAL CURRENT LIMIT (X) Pin:
Input pin for external current limit adjustment and remote
ON/OFF. A connection to SOURCE pin disables all functions
on this pin.
FREQUENCY (F) Pin:
Input pin for selecting switching frequency: 400 kHz if
connected to SOURCE pin and 300 kHz if connected to
CONTROL pin.
SOURCE (S) Pin:
Output MOSFET source connection for the power return.
Primary side control circuit common and reference point.
Tab internally connected
to SOURCE pin
(See layout considerations)
R Package
(TO-263-7C)
P Package (DIP-8)
G Package (SMD-8)
C
L
X
F
1
2
3
4
8
7
6
5
S
S
D
S
123 4 5
CL X S F
7
D
PI-4030-110507
Figure 2.
Pin Configuration (Top View).
3
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Rev. U 06/15
DPA422-426
DPA-Switch
Family Functional Description
DPA-Switch is an integrated switched mode power supply chip
that converts a current at the control input to a duty cycle at the
open drain output of a high-voltage power MOSFET. During
normal operation the duty cycle of the power MOSFET
decreases linearly with increasing CONTROL pin current as
shown in Figure 4. A patented high-voltage CMOS technology
allows both the high-voltage power MOSFET and all the low
voltage control circuitry to be cost effectively integrated onto a
single monolithic chip.
In addition to the standard TOPSwitch features, such as the
high-voltage start-up, the cycle-by-cycle current limiting, loop
compensation circuitry, auto-restart and thermal shutdown,
DPA-Switch also offers many advanced features that reduce
system cost and increase power supply performance and
design flexibility. Following is a summary of the advanced
features:
1. A fully integrated 5 ms soft-start limits peak currents and
voltages during start-up and reduces or eliminates output
overshoot in most applications.
2. A 75% maximum duty cycle (DC
MAX
) together with the line
feed-forward with DC
MAX
reduction feature makes
DPA-Switch well suited for both flyback and forward
topologies.
3. High switching frequency (400 kHz/300 kHz, pin selectable)
allows the use of smaller size transformers and offers high
bandwidth for power supply control loop.
4. Cycle skipping operation at light load minimizes standby
power consumption (typically <10 mA input current).
5. Line undervoltage ensures glitch free operations at both
power-up and power-down and is tightly toleranced over
process and temperature to meet system level requirements
common in DC to DC converters (e.g. ETSI).
6. Line overvoltage protects DPA-Switch against excessive
input voltage and line surge.
7. External current limit adjustment allows the setting of the
current limit externally to a lower level near the operating
peak current and, if desired, further adjusts the level gradu-
ally as line voltage rises. This makes possible an ideal
implementation of overload power limiting.
8. Synchronization function allows the synchronization of
DPA-Switch operation to an external lower frequency.
9. Remote ON/OFF feature permits DPA-Switch based power
supplies to be easily switched on/off using logic signals.
Maximum input current consumption is 2 mA in remote OFF.
10. Hysteretic over-temperature shutdown provides automatic
recovery from thermal fault.
11. Tight absolute tolerances and small temperature variations
on switching frequency, current limit, and undervoltage lock
out threshold (UV).
Three pins, LINE-SENSE (L), EXTERNAL CURRENT LIMIT (X)
and FREQUENCY (F), are used to implement all the pin -
controllable features. A resistor from the LINE-SENSE pin to DC
input bus implements line UV, line OV and line feed-forward with
DC
MAX
reduction. A resistor from the EXTERNAL CURRENT
LIMIT pin to the SOURCE pin sets current limit externally. In
4
Rev. U 06/15
Auto-restart
I
CD1
75
Duty Cycle (%)
I
B
Slope = PWM Gain
42
I <I
L
L(DC)
I
C (SKIP)
4
I = 115
µA
L
I
C
(mA)
PI-2761-112102
Figure 4.
Relationship of Duty Cycle to CONTROL Pin Current.
addition, remote ON/OFF may be implemented through either
the LINE-SENSE pin or the EXTERNAL CURRENT LIMIT pin
depending on the polarity of the logic signal available as well as
other system specific considerations. Shorting both the LINE-
SENSE and the EXTERNAL CURRENT LIMIT pins to the
SOURCE pin disables line OV, line UV, line feed-forward with
DC
MAX
reduction, external current limit, remote ON/OFF and
synchronization. The FREQUENCY pin sets the switching
frequency to 400 kHz if connected to the SOURCE pin, or
300 kHz if connected to the CONTROL pin. This pin should not
be left open. Please refer to “Using Feature Pins” section for
detailed information regarding the proper use of those pins.
CONTROL (C) Pin Operation
The CONTROL pin is a low impedance node that is capable of
receiving a combined supply and feedback current. During
normal operation, a shunt regulator is used to separate the
feedback signal from the supply current. CONTROL pin voltage
V
C
is the supply voltage for the control circuitry including the
MOSFET gate driver. An external bypass capacitor closely
connected between the CONTROL and SOURCE pins is
required to supply the instantaneous gate drive current. The
total amount of capacitance connected to this pin also sets the
auto-restart timing as well as control loop compensation.
When the DC input voltage is applied to the DRAIN pin during
start-up, the MOSFET is initially off, and the CONTROL pin
capacitor is charged through the switched high-voltage current
source connected internally between the DRAIN and
CONTROL pins. When the CONTROL pin voltage V
C
reaches
approximately 5.8 V, the control circuitry is activated and the
soft-start begins. The soft-start circuit gradually increases the
duty cycle of the MOSFET from zero to the maximum value
over approximately 5 ms. The high-voltage current source is
turned off at the end of the soft-start. If no external feedback/
supply current is fed into the CONTROL pin by the end of the
soft-start, the CONTROL pin will start discharging in response
to the supply current drawn by the control circuitry and the gate
current of the switching MOSFET driver. If the power supply is
designed properly, and no fault condition such as open loop or
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DPA422-426
overloaded output exists, the feedback loop will close, providing
external CONTROL pin current, before the CONTROL pin
voltage has had a chance to discharge to the lower threshold
voltage of approximately 4.8 V (internal supply undervoltage
lockout threshold). When the externally fed current charges the
CONTROL pin to the shunt regulator voltage of 5.8 V, current in
excess of the consumption of the chip is shunted to SOURCE
through resistor R
E
as shown in Figure 2. This current flowing
through R
E
controls the duty cycle of the power MOSFET to
provide closed loop regulation. The shunt regulator has a finite
low output impedance Z
C
that sets the gain of the error amplifier
when used in a primary feedback configuration. The dynamic
impedance Z
C
of the CONTROL pin together with the external
CONTROL pin capacitance sets the dominant pole for the
control loop.
When a fault condition such as an open loop or overloaded
output prevents the flow of an external current into the CONTROL
pin, the capacitor on the CONTROL pin discharges towards 4.8
V. At 4.8 V auto-restart is activated which turns the output
MOSFET off and puts the control circuitry in a low current
standby mode. The high-voltage current source turns on and
charges the external capacitance again. A hysteretic internal
supply undervoltage comparator keeps V
C
within a window of
typically 4.8 V to 5.8 V by turning the high-voltage current
source on and off as shown in Figure 5. The auto-restart circuit
has a divide-by-8 counter that prevents the output MOSFET
from turning on again until eight discharge/charge cycles have
elapsed. This is accomplished by enabling the output MOSFET
only when the divide-by-8 counter reaches full count (S7). The
counter effectively limits DPA-Switch power dissipation as well
as the maximum power delivered to the power supply output by
reducing the auto-restart duty cycle to typically 4%. Auto-
restart mode continues until output voltage regulation is again
achieved through closure of the feedback loop.
Oscillator and Switching Frequency
The internal oscillator linearly charges and discharges an
internal capacitance between two voltage levels to create a
sawtooth waveform for the pulse width modulator. The
oscillator sets both the pulse width modulator latch and the
current limit latch at the beginning of each cycle.
The nominal switching frequency of 400 kHz was chosen to
minimize the transformer size and to allow faster power supply
loop response. The FREQUENCY pin, when shorted to the
CONTROL pin, lowers the switching frequency to 300 kHz,
which may be preferable in some applications such as those
employing secondary synchronous rectification. Otherwise, the
FREQUENCY pin should be connected to the SOURCE pin for
the default 400 kHz.
Pulse Width Modulator and Maximum Duty Cycle
The pulse width modulator implements voltage mode control by
driving the output MOSFET with a duty cycle inversely
proportional to the current into the CONTROL pin that is in
excess of the internal supply current of the chip (see Figure 4).
The excess current is the feedback error signal that appears
across R
E
(see Figure 2). This signal is filtered by an RC network
with a typical corner frequency of 30 kHz to reduce the effect of
switching noise in the chip supply current generated by the
MOSFET gate driver. The filtered error signal is compared with
the internal oscillator sawtooth waveform to generate the duty
cycle waveform. As the control current increases, the duty cycle
decreases. A clock signal from the oscillator sets a latch that
turns on the output MOSFET. The pulse width modulator resets
the latch, turning off the output MOSFET. Note that a minimum
current must be driven into the CONTROL pin before the duty
cycle begins to change.
~
~
~
~
V
UV
~
~
V
LINE
0V
S7
S0
S1
S2
S6
S7
S0
S1
S2
S6
S7
S0
S1
V
C
0V
S2
S6
S7
S7
5.8 V
4.8 V
~
~
~
~
~
~
~
~
~
~
V
DRAIN
0V
~
~
V
OUT
0V
~
~
~
~
~
~
1
2
3
2
4
PI-3867-050602
Note: S0 through S7 are the output states of the auto-restart counter
Figure 5.
Typical Waveforms for (1) Power Up, (2) Normal Operation, (3) Auto-restart and (4) Power Down.
5
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Rev. U 06/15
ADI Reference Circuit
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