Revision 18
Axcelerator Family FPGAs
Leading-Edge Performance
•
•
•
•
•
•
•
•
•
•
•
•
•
•
350+ MHz System Performance
500+ MHz Internal Performance
High-Performance Embedded FIFOs
700 Mb/s LVDS Capable I/Os
– Voltage-Referenced I/O Standards: GTL+, HSTL Class 1,
SSTL2 Class 1 and 2, SSTL3 Class 1 and 2
– Registered I/Os
– Hot-Swap Compliant I/Os (except PCI)
– Programmable Slew Rate and Drive Strength on Outputs
– Programmable Delay and Weak Pull-Up/Pull-Down Circuits
on Inputs
Embedded Memory:
– Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4, x9, x18,
x36 Organizations Available)
– Independent, Width-Configurable Read and Write Ports
– Programmable Embedded FIFO Control Logic
Segmentable Clock Resources
Embedded Phase-Locked Loop:
– 14-200 MHz Input Range
– Frequency Synthesis Capabilities up to 1 GHz
Deterministic, User-Controllable Timing
Unique In-System Diagnostic and Debug Capability with
Microsemi Silicon Explorer II
Boundary-Scan Testing Compliant with IEEE Standard 1149.1
(JTAG)
FuseLock™ Programming Technology Protects Against
Reverse Engineering and Design Theft
Specifications
Up to 2 Million Equivalent System Gates
Up to 684 I/Os
Up to 10,752 Dedicated Flip-Flops
Up to 295 kbits Embedded SRAM/FIFO
Manufactured on Advanced 0.15
μm
CMOS Antifuse Process
Technology, 7 Layers of Metal
Single-Chip, Nonvolatile Solution
Up to 100% Resource Utilization with 100% Pin Locking
1.5 V Core Voltage for Low Power
Footprint Compatible Packaging
Flexible, Multi-Standard I/Os:
– 1.5 V, 1.8 V, 2.5 V, 3.3 V Mixed Voltage Operation
– Bank-Selectable I/Os – 8 Banks per Chip
– Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3V PCI,
and 3.3 V PCI-X
– Differential I/O Standards: LVPECL and LVDS
•
Features
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•
•
•
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•
Table 1 • Axcelerator Family Product Profile
Device
Capacity (in Equivalent System Gates)
Typical Gates
Modules
Register (R-cells)
Combinatorial (C-cells)
Maximum Flip-Flops
Embedded RAM/FIFO
Number of Core RAM Blocks
Total Bits of Core RAM
Clocks (Segmentable)
Hardwired
Routed
PLLs
I/Os
I/O Banks
Maximum User I/Os
Maximum LVDS Channels
Total I/O Registers
Package
PQ
BG
FG
CQ
CG
AX125
AX250
AX500
AX1000
AX2000
125,000
82,000
672
1,344
1,344
4
18,432
4
4
8
8
168
84
504
250,000
154,000
1,408
2,816
2,816
12
55,296
4
4
8
8
248
124
744
208
500,000
286,000
2,688
5,376
5,376
16
73,728
4
4
8
8
336
168
1,008
208
484, 676
208, 352
1,000,000
612,000
6,048
12,096
12,096
36
165,888
4
4
8
8
516
258
1,548
2,000,000
1,060,000
10,752
21,504
21,504
64
294,912
4
4
8
8
684
342
2,052
256, 324
256, 484
208, 352
729
484, 676, 896
352
624
896, 1152
256, 352
624
March 2012
© 2012 Microsemi Corporation
i
Axcelerator Family FPGAs
Ordering Information
AX1000 _
1
FG
G
896
I
Application
Blank = Commercial (0 to +70° C)
PP = Pre-Production
I = Industrial (-40 to +85° C)
M = Military (-55 to +125° C)
Package Lead Count
Lead-Free Packaging
Blank = Standard Packaging
G= RoHS-Compliant Packaging
Package Type
BG = Ball Grid Array (1.27mm pitch)
FG = Fine Ball Grid Array (1.0mm pitch)
PQ = Plastic Quad Flat Pack (0.5mm pitch)
CQ = Ceramic Quad Flat Pack (0.5mm pitch)
CG = Ceramic Column Grid Array
Speed Grade
Blank = Standard Speed
1 = Approximately 15% Faster than Standard
2 = Approximately 25% Faster than Standard
Part Number
AX125 = 125,000 Equivalent System Gates
AX250 = 250,000 Equivalent System Gates
AX500 = 500,000 Equivalent System Gates
AX1000 = 1,000,000 Equivalent System Gates
AX2000 = 2,000,000 Equivalent System Gates
Device Resources
User I/Os (Including Clock Buffers)
Package
PQ208
CQ208
CQ256
FG256
FG324
CQ352
FG484
CG624
FG676
BG729
FG896
FG1152
AX125
–
–
–
138
168
–
–
–
–
–
–
–
AX250
115
115
–
138
–
198
248
–
–
–
–
–
AX500
115
115
–
–
–
198
317
–
336
–
–
–
AX1000
–
–
–
–
–
198
317
418
418
516
516
–
AX2000
–
–
136
–
–
198
–
418
–
–
586
684
Note:
The FG256, FG324, and FG484 are footprint compatible with one another. The FG676, FG896, and FG1152 are also footprint
compatible with one another.
ii
R evis i o n 18
Axcelerator Family FPGAs
Axcelerator Family Device Status
Axcelerator
®
Devices
AX125
AX250
AX500
AX1000
AX2000
Status
Production
Production
Production
Production
Production
Temperature Grade Offerings
Package
PQ208
CQ208
CQ256
FG256
FG324
CQ352
FG484
CG624
FG676
BG729
FG896
FG1152
C = Commercial
I = Industrial
M = Military
AX125
–
–
–
C, I
C, I
–
–
–
–
–
–
–
AX250
C, I, M
M
–
C, I, M
–
M
C, I, M
–
–
–
–
–
AX500
C, I, M
M
–
–
–
M
C, I, M
–
C, I, M
–
–
–
AX1000
–
–
–
–
–
M
C, I, M
M
C, I, M
C, I, M
C, I, M
–
AX2000
–
–
M
–
–
M
–
M
–
–
C, I, M
C, I, M
Speed Grade and Temperature Grade Matrix
Temperature Grade
C
I
M
C = Commercial
I = Industrial
M = Military
–
Std
–1
–2
R ev i si o n 1 8
iii
Axcelerator Family FPGAs
Packaging Data
Refer to the following documents located on the Microsemi SoC Products Group website for additional packaging information.
Package Mechanical Drawings
Package Thermal Characteristics and Weights
Hermatic Package Mechanical Information
Contact your local Microsemi representative for device availability.
iv
Revision 18
Axcelerator Family FPGAs
Table of Contents
General Description
Device Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Design Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1
1-7
1-8
1-8
Detailed Specifications
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
I/O Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Voltage-Referenced I/O Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-43
Differential Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-50
Module Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-54
Routing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-61
Global Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-66
Axcelerator Clock Management System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-75
Embedded Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-86
Other Architectural Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-106
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-110
Package Pin Assignments
BG729 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
FG256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
FG324 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
FG484 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
FG676 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37
FG896 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-52
FG1152 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-71
PQ208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-84
CQ208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-89
CQ256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-94
CQ352 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-98
CG624 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-115
Datasheet Information
List of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Datasheet Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Safety Critical, Life Support, and High-Reliability Applications Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
R ev i si o n 1 8
v
京公网安备 11010802033920号
EEWORLD
