IW4069UB
H
EX
I
NVERTER
High-Voltage Silicon-Gate CMOS
The IW4069UB types consist of six inverter circuits. These
devices are intended for all general-purpose inverter applications
where the medium-power TTL-drive and logic-level-conversion
capabilities of circuits such as the IW4049UB Hex Inverter/Buffers
are not required. Each of the six inverters is a single stage
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
0.5 V min @ 5.0 V supply
1.0 V min @ 10.0 V supply
1.0 V min @ 15.0 V supply
ORDERING INFORMATION
IW4069UBN Plastic
IW4069UBD SOIC
T
A
= -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =V
CC
PIN 7 = GND
FUNCTION TABLE
Inputs
Output
A
Y
L
H
H
L
1
IW4069UB
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
mA
±10
P
D
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
P
D
r Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
°C
260
T
L
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
A
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
IW4069UB
AC ELECTRICAL CHARACTERISTICS(C
L
=50pF, R
L
=200kΩ, Input t
r
=t
f
=20 ns)
Guaranteed Limit
V
CC
Symbol
Parameter
V
≥-55
25°C
≤125
°C
°C
220
110
110
t
PLH
,
Maximum Propagation Delay, Input A to 5.0
120
60
60
t
PHL
Output Y (Figure 1)
10
100
50
50
15
400
200
200
t
TLH
, t
THL
Maximum Output Transition Time, Any 5.0
200
100
100
Output (Figure 1)
10
160
80
80
15
C
IN
Maximum Input Capacitance
-
15
Unit
ns
ns
pF
Figure 1. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
4
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