PIC16(L)F18857/77
Full-Featured 28/40/44-Pin Microcontrollers
Description
PIC16(L)F18857/77 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,
combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.
The family will feature the CRC/SCAN, Hardware Limit Timer (HLT) and Windowed Watchdog Timer (WWDT) to support
customers looking to add safety to their application. Additionally, this family includes up to 56 KB of Flash memory, along
with a 10-bit ADC with Computation (ADC
2
) extensions for automated signal analysis to reduce the complexity of the
application.
Core Features
• C Compiler Optimized RISC Architecture
• Only 49 Instructions
• Operating Speed:
- DC – 32 MHz clock input
- 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Three 8-Bit Timers (TMR2/4/6) with Hardware
Limit Timer (HLT) Extensions
• Four 16-Bit Timers (TMR0/1/3/5)
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR) with Fast Recovery
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
- Variable prescaler selection
- Variable window size selection
- All sources configurable in hardware or
software
• Programmable Code Protection
Power-Saving Functionality
• DOZE mode: Ability to run the CPU core slower
than the system clock
• IDLE mode: Ability to halt CPU core while internal
peripherals continue operating
• Sleep mode: Lowest Power Consumption
• Peripheral Module Disable (PMD):
- Ability to disable hardware module to
minimize power consumption of unused
peripherals
eXtreme Low-Power (XLP) Features
•
•
•
•
Sleep mode: 50 nA @ 1.8V, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
- 8
A
@ 32 kHz, 1.8V, typical
- 32
A/MHz
@ 1.8V, typical
Digital Peripherals
• Four Configurable Logic Cells (CLC):
- Integrated combinational and sequential logic
• Three Complementary Waveform Generators
(CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
• Five Capture/Compare/PWM (CCP) module:
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
• 10-bit PWM:
- Two 10-bit PWMs
• Numerically Controlled Oscillator (NCO):
- Generates true linear frequency control and
increased frequency resolution
- Input Clock: 0 Hz < F
NCO
< 32 MHz
- Resolution: F
NCO
/2
20
• Two Signal Measurement Timers (SMT):
- 24-bit Signal Measurement Timer
- Up to 12 different Acquisition modes
Memory
•
•
•
•
Up to 56 KB Flash Program Memory
Up to 4 KB Data SRAM
256B of EEPROM
Direct, Indirect and Relative Addressing modes
Operating Characteristics
• Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF18857/77)
- 2.3V to 5.5V (PIC16F18857/77)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
2016-2017 Microchip Technology Inc.
DS40001825B-page 1
PIC16(L)F18857/77
Digital Peripherals (Cont.)
• Cyclical Redundancy Check (CRC/SCAN):
- 16-bit CRC
- Scans memory for NVM integrity
• Communication:
- EUSART, RS-232, RS-485, LIN compatible
- Two SPI
- Two I
2
C, SMBus, PMBus™ compatible
• Up to 36 I/O Pins:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
- Input level selection control (ST or TTL)
- Digital open-drain enable
- Current mode enable
• Peripheral Pin Select (PPS):
- Enables pin mapping of digital I/O
• Data Signal Modulator (DSM)
- Modulates a carrier signal with digital data to
create custom carrier synchronized output
waveforms
Flexible Oscillator Structure
• High-Precision Internal Oscillator:
- Software selectable frequency range up to 32
MHz, ±1% typical
• x2/x4 PLL with Internal and External Sources
• Low-Power Internal 32 kHz Oscillator
(LFINTOSC)
• External 32 kHz Crystal Oscillator (SOSC)
• External Oscillator Block with:
- Three crystal/resonator modes up to 20 MHz
- Three external clock modes up to 20 MHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock
stops
• Oscillator Start-up Timer (OST)
- Ensures stability of crystal oscillator
resources
Analog Peripherals
• Analog-to-Digital Converter with Computation
(ADC
2
):
- 10-bit with up to 35 external channels
- Automated post-processing
- Automates math functions on input signals:
averaging, filter calculations, oversampling
and threshold comparison
- Operates in Sleep
• Two Comparators (COMP):
- Fixed Voltage Reference at (non) inverting
input(s)
- Comparator outputs externally accessible
• 5-Bit Digital-to-Analog Converter (DAC):
- 5-bit resolution, rail-to-rail
- Positive Reference Selection
- Unbuffered I/O pin output
- Internal connections to ADCs and
comparators
• Voltage Reference:
- Fixed Voltage Reference with 1.024V, 2.048V
and 4.096V output levels
2016-2017 Microchip Technology Inc.
DS40001825B-page 2
PIC16(L)F18857/77
PIC16(L)F188XX Family Types
CRC and Memory Scan
Peripheral Pin Select
Zero-Cross Detect
10-Bit
ADC
2
(ch)
Data Sheet Index
Program Flash
Memory (Words)
CCP/10-Bit PWM
Windowed
Watchdog Timer
EUSART/I
2
C/SPI
8-Bit (with HLT)/
16-Bit Timers
Peripheral Module
Disable
Y
Y
Y
Y
Y
Y
Y
Program Flash
Memory (KB)
Comparator
Data SRAM
(bytes)
I/O Pins
(1)
5-Bit DAC
EEPROM
(bytes)
CWG
Device
PIC16(L)F18854
PIC16(L)F18855
PIC16(L)F18856
PIC16(L)F18857
PIC16(L)F18857
PIC16(L)F18857
PIC16(L)F18857
PIC16(L)F18857
PIC16(L)F18875
PIC16(L)F18876
PIC16(L)F18877
PIC16(L)F18877
PIC16(L)F18877
PIC16(L)F18877
PIC16(L)F18877
Note 1:
(1)
(2)
4096
8192
7
14
28
256
256
256
512 25 24 1
1024 25 24 1
2048 25 24 1
2
2
2
3/4
3/4
3/4
2
2
2
Y
Y
Y
Y
Y
Y
5/2
5/2
5/2
Y
Y
Y
3
3
3
1
1
1
4
4
4
(3) 16384
(4) 32768
56
256
4096 25 24 1
2
3/4
2
Y
Y
5/2
Y
3
1
4
(2)
8192
14
28
256
256
1024 36 35 1
2048 36 35 1
2
2
3/4
3/4
2
2
Y
Y
Y
Y
5/2
5/2
Y
Y
3
3
1
1
4
4
(3) 16384
(4) 32768
56
256
4096 36 35 1
2
3/4
2
Y
Y
5/2
Y
3
1
4
One pin is input-only.
Data Sheet Index:
(Unshaded devices are described in this document)
1:
DS40001826
PIC16(L)F18854 Data Sheet, 28-Pin, Full-Featured 8-bit Microcontrollers
2:
DS40001802
PIC16(L)F18855/75 Data Sheet, 28/40-Pin, Full-Featured 8-bit Microcontrollers
3:
DS40001824
PIC16(L)F18856/76 Data Sheet, 28/40-Pin, Full-Featured 8-bit Microcontrollers
4:
DS40001825
PIC16(L)F18857/77 Data Sheet, 28/40-Pin, Full-Featured 8-bit Microcontrollers
Note:
For other small form-factor package availability and marking information, please visit
http://www.microchip.com/packaging
or contact your local sales office.
2016-2017 Microchip Technology Inc.
DS40001825B-page 3
DSM
NCO
SMT
CLC
1 1/2 Y
1 1/2 Y
1 1/2 Y
1 1/2 Y
1 1/2 Y
1 1/2 Y
1 1/2 Y
PIC16(L)F18857/77
TABLE 1:
PACKAGES
(S)PDIP
SOIC
SSOP
QFN
(6x6)
UQFN
(4x4)
TQFP
QFN
(8x8)
UQFN
(5x5)
Packages
PIC16(L)F18857PIC16(L)F188
57
PIC16(L)F18877
Note:
Pin details are subject to change.
PIN DIAGRAMS
28-pin SPDIP, SOIC, SSOP
V
PP
/MCLR/RE3
RA0
RA1
RA2
RA3
RA4
RA5
V
SS
RA7
RA6
RC0
RC1
RC2
RC3
Note 1:
2:
1
2
3
4
5
6
28
27
26
25
24
23
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
V
DD
V
SS
RC7
RC6
RC5
RC4
7
PIC16(L)F18857
22
21
8
9
10
11
12
13
14
20
19
18
17
16
15
See
Table 2
for location of all peripheral functions.
All V
DD
and all V
SS
pins must be connected at the circuit board level. Allowing one or more V
SS
or V
DD
pins
to float may result in degraded electrical performance or non-functionality.
2016-2017 Microchip Technology Inc.
DS40001825B-page 4
PIC16(L)F18857/77
RA1
RA0
RE3/MCLR/V
PP
RB7
RB6
RB5
RB4
28
27
26
25
24
23
22
28-pin QFN (6x6)
RA2
RA3
RA4
RA5
V
SS
RA7
RA6
Note 1:
2:
3:
See
Table 2
for location of all peripheral functions.
All V
DD
and all V
SS
pins must be connected at the circuit board level. Allowing one or more V
SS
or V
DD
pins to
float may result in degraded electrical performance or non-functionality.
The bottom pad of the QFN/UQFN package should be connected to V
SS
at the circuit board level.
40-pin PDIP
V
PP
/MCLR/RE3
RA0
RA1
RA2
RA3
RA4
RA5
RE0
RE1
RE2
V
DD
V
SS
RA7
RA6
RC0
RC1
RC2
RC3
RD0
RD1
Note 1:
2:
1
2
3
4
5
6
7
PIC16(L)F18877
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
RB7/ICSPDAT
RB6/ICSPCLK
RB5
RB4
RB3
RB2
RB1
RB0
V
DD
V
SS
RD7
RD6
RD5
RD4
RC7
RC6
RC5
RC4
RD3
RD2
See
Table 3
for location of all peripheral function.
All V
DD
and all V
SS
pins must be connected at the circuit board level. Allowing one or more V
SS
or V
DD
pins to
float may result in degraded electrical performance or non-functionality.
2016-2017 Microchip Technology Inc.
RC0 8
RC1 9
RC2 10
RC3 11
RC4 12
RC5 13
RC6 14
1
2
3
4
5
6
7
PIC16(L)F18857
21
20
19
18
17
16
15
RB3
RB2
RB1
RB0
V
DD
V
SS
RC7
DS40001825B-page 5
京公网安备 11010802033920号
EEWORLD
