SY898530U
500MHz 1:16 3.3V-to-2.5/3.3V LVPECL
Fanout Buffer
General Description
The SY898530U is a 1:16 Fanout buffer which can accept
most standard differential logic levels and outputs the
signal as a differential 2.5V or 3.3V LVPECL signal. The
part can amplify input signals as small as 150mVpp to the
full LVPECL output swing. The SY898530U is well suited
for clock distribution applications which demand versatility
and low-skew performance. It is pin-to-pin compatible with
IDT’s ICS8530 fanout buffer.
The SY898530U operates from a 3.3V ±5% core power
supply and a 2.5V ±5% or a 3.3V ±5% output supply. The
SY898530U is guaranteed over the full commercial
temperature range (0°C to +70°C). It is available in a 48-
pin TQFP lead-free package.
Data sheets and support documentation can be found on
Micrel’s web site at
www.micrel.com.
Features
16 Differential 2.5V/3.3V LVPECL outputs
Differential CLK inputs. Accepts LVDS, LVPECL,
LVHSTL, SSTL, HCSL logic levels
Translates any single-ended input signal to 2.5/3.3V
LVPECL levels with a resistor bias on /CLK input
500MHz maximum output frequency
<50ps output skew
<250ps part-to-part skew
<2ns propagation delay
3.3V Core, 2.5/3.3V output operating supply
0°C to +70°C operating temperature
Available in 48-pin TQFP package
Pin-to-pin compatible with ICS8530
Functional Block Diagram
Applications
Data distribution
High-performance PCs
Communications
Parallel processor-based systems
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
November 2011
M9999-111011-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY898530U
Ordering Information
(1)
Part Number
SY898530UTZ
SY898530UTZTR
(2)
SY898530UTZTX
(2, 3)
Notes:
1.
2.
3.
Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
Tape and Reel.
EIA specification orientation.
Package Type
TQFP-48
TQFP-48
TQFP-48
Operating Range
Commercial
Commercial
Commercial
Package Marking
SY898530UTZ with Pb-Free bar-line indicator
SY898530UTZ with Pb-Free bar-line indicator
SY898530UTZ with Pb-Free bar-line indicator
Lead Finish
Matte-Sn
Matte-Sn
Matte-Sn
Pin Configuration
48-Pin TQFP (TQFP-48)
November 2011
2
M9999-111011-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY898530U
Pin Description
Pin Number
36, 37
33, 34
31, 32
28, 29
26, 27
22, 23
20, 21
17, 18
15, 16
9, 10
7, 8
4, 5
2, 3
46, 47
44, 45
41, 42
39, 40
1, 11, 14, 24,
25, 35, 38, 48
12, 13
6, 19, 30, 43
Pin Name
CLK, /CLK
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Q4, /Q4
Q5, /Q5
Q6, /Q6
Q7, /Q7
Q8, /Q8
Q9, /Q9
Q10, /Q10
Q11, /Q11
Q12, /Q12
Q13, /Q13
Q14, /Q14
Q15, /Q15
VCCO
VCC
VEE
Output Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the
V
CCO
pins as possible. Supplies the output buffers.
Core Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the V
CC
pins as possible. Supplies input and core circuitry.
Ground
LVPECL Differential Output Pairs. Differential buffered copies of the input signal. The
output swing is typically 740mV. See Interface Applications for termination information.
Pin Function
Differential Clock Inputs. Accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL logic levels.
CLK is internally connected to a pull-down resistor, /CLK is internally connected to a pull-
up resistor. See “Pin Characteristics” for typical values.
Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Description
Input Capacitance
Input Pull Up Resistor
Input Pull Down Resistor
Min.
Typ.
4
50
30
Max.
Units
pF
KΩ
KΩ
Clock Input Function Table
Inputs
CLK
0
1
0
1
Biased
(1)
Biased
(1)
Note:
1.
Refer to Interface Applications for Single-Ended Interfaces.
Outputs
/CLK
1
0
Biased
Biased
0
1
(1)
(1)
Qx
Low
High
Low
High
High
Low
/Qx
High
Low
High
Low
Low
High
Input to Output Mode
Differential to Differential
Differential to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Polarity
Non-Inverting
Non-Inverting
Non-Inverting
Non-Inverting
Inverting
Inverting
November 2011
3
M9999-111011-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY898530U
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
)................................................4.6V
Input Voltage (V
IN
) ............................–0.5V to V
CC
+ 0.5V
LVPECL Output Current (I
OUT
)
Continuous.......................................................50mA
Surge .............................................................100mA
Lead Temperature (soldering, 20sec.).................. 260°C
Storage Temperature (T
s
) ....................–65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
) ......................... 3.135V to 3.465V
Output Supply Voltage (V
CCO
)............ 2.375V to 3.465V
Ambient Temperature (T
A
)........................0°C to +70°C
Package Thermal Resistance
(3)
TQFP
Still-air (
JA
) .........................................48°C/W
Junction-to-Case (
JC
).........................13°C/W
DC Electrical Characteristics
(6)
V
CC
= 3.135V to 3.465V, V
CCO
= 2.375V to 3.465V, T
A
= 0°C to +70°C, unless otherwise stated.
Symbol
V
CC
V
CCO
I
EE
I
IH
I
IL
V
PP
V
CMR
Parameter
Power Supply Voltage Range
Output Power Supply
Power Supply Current
Input HIGH Current
Input LOW Current
CLK
/CLK
CLK
/CLK
Max. V
CC,
V
CCO
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V
,
V
IN
= 0.5V
5
150
0.15
Note 4, 5
0.5
1.3
V
cc
0.85
Condition
Min.
3.135
2.375
Typ.
3.3
Max.
3.465
3.465
125
150
5
Units
V
V
mA
uA
uA
uA
uA
V
V
Peak-to-Peak Input Swing
Common Mode Input Voltage
PECL Outputs DC Electrical Characteristics
(6)
V
CC
= 3.135V to 3.465V, V
CCO
= 2.375V to 3.465V, T
A
= 0°C to +70°C, Outputs terminated with 50Ω to V
CCO
-2V unless otherwise stated.
Symbol
V
OH
V
OL
V
OUT
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions
for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
JA
and
JC
values are determined for a 4-layer board in still-air.
4. For single-ended applications, the maximum input voltage for CLK, /CLK is V
CC
+0.3V.
5. Common mode voltage is defined as V
IH
.
6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Output HIGH Voltage
Output LOW Voltage
Output Voltage Swing
Condition
Min.
V
CCO
1.1
V
CCO
2.0
0.55
Typ.
Max.
V
CCO
0.7
V
CCO
1.4
0.93
Units
V
V
V
November 2011
4
M9999-111011-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY898530U
AC Electrical Characteristics
V
CC
= 3.135V to 3.465V, V
CCO
= 2.375V to 3.465V, T
A
= 0°C to +70°C, unless otherwise stated.
Symbol
f
MAX
t
PD
t
Skew
t
JITTER
t
R
, t
F
Parameter
Maximum Frequency
Propagation Delay
Output-to-Output skew
Part-to-Part Skew
Integration Range = 12kHz
20MHz
Output Rise/Fall Times
(20% to 80%)
Duty Cycle
Notes:
7.
8.
9.
Measured from the differential input crossing point to the differential output crossing point.
Output-to-Output skew is the difference in time between outputs, receiving data from the same input, for the same temperature, voltage and
transition.
Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
Condition
Note 7
Note 8, 10
Notes 9, 10
Output = 500MHz
At full output swing.
Min.
500
1
Typ.
Max.
2
Units
MHz
ns
ps
ps
fs
RMS
26
127
300
47
50
50
250
700
53
ps
%
10. This parameter is defined in accordance with JEDEC Standard 65.
November 2011
5
M9999-111011-C
hbwhelp@micrel.com
or (408) 955-1690
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