AGR18030EF
30 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor
Introduction
The AGR18030EF is a high-voltage, gold-metallized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power field effect transistor (FET) suit-
able for global system for mobile communication
(GSM), enhanced data for global evolution (EDGE),
and multicarrier class AB power amplifier applica-
tions. This device is manufactured using advanced
LDMOS technology offering state-of-the-art perfor-
mance and reliability. It is packaged in an industry-
standard package and is capable of delivering a min-
imum output power of 30 W, which makes it ideally
suited for today’s RF power amplifier applications.
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case
Sym
R
ı
JC
Value
2.0
Unit
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Sym Value
Drain-source Voltage
V
DSS
65
Gate-source Voltage
V
GS
–0.5, 15
Drain Current Continuous
I
D
Total Dissipation at T
C
= 25 °C P
D
87.5
Derate Above 25
°C
—
0.5
Operating Junction Tempera-
T
J
200
ture
Storage Temperature Range T
STG
–65, 150
Unit
Vdc
Vdc
Adc
W
W/°C
°C
°C
Figure 1. Available (flanged) Packages
Features
Typical performance ratings for GSM EDGE
(f = 1.840 GHz, P
OUT
= 10 W)
— Error vector magnitude (EVM): 1.6%
— Power gain: 15 dB
— Drain efficiency: 30%
— Modulation spectrum:
@ ±400 kHz = –64 dBc.
@ ±600 kHz = –71 dBc.
Typical continuous wave (CW) performance over
entire digital communication system (DCS) band:
— P1dB: 33 W typical (typ).
— Power gain: @ P1dB = 14 dB.
— Efficiency: @ P1dB = 51% typ.
— Return loss: –12 dB.
High-reliability, gold-metallization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
30 W minimum output power.
Device can withstand 10:1 voltage standing wave
ratio (VSWR) at 26 Vdc, 1.840 GHz, 30 W CW
output power.
Large signal impedance parameters available.
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR18030EF
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations.
PEAK Devices
Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR18030EF
30 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: T
C
= 30 °C.
Table 4. dc Characteristics
Parameter
Off Characteristics
Gate-source Leakage Current (V
GS
= 5 V, V
DS
= 0 V)
= 38 µA)
Drain-source Breakdown Voltage (V
GS
= 0 V, I
D
= 150µA
V
(BR)DSS
I
GSS
I
DSS
G
FS
65
—
—
—
—
—
—
2.4
1
50
3
—
µAdc
µAdc
S
Vdc
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current (V
DS
= 26 V, V
GS
= 0 V)
On Characteristics
Forward Transconductance (V
DS
= 10 V, I
D
= 0.4 A)
Gate Quiescent Voltage (V
DS
= 26 V, I
D
= 300 mA)
Drain-source On-voltage (V
GS
= 10 V, I
D
= 0.4 A)
Table 5. RF Characteristics
Parameter
Drain-to-gate Capacitance
(V
DS
= 26 V, V
GS
= 0 V, f = 1 MHz)
Power Gain
(V
DS
= 26 V, P
OUT
= 15 W, I
DQ
= 300 mA)
Gate Threshold Voltage (V
DS
= 10 V, I
D
= 100 µA)
V
GS(TH)
V
DS(ON)
V
GS(Q)
2.8
3.0
—
3.4
3.8
4.0
4.6
—
—
Vdc
Vdc
Vdc
0.30
Symbol
Dynamic Characteristics
C
RSS
Min
—
Typ
0.8
Max
—
Unit
pF
Functional Tests* (in
Supplied Test Fixture)
Agere Systems Supplied Test Fixture)
G
L
ˇ
—
—
15
30
—
—
dB
%
Drain Efficiency
(V
DS
= 26 V, P
OUT
= 15 W, I
DQ
= 300 mA)
EDGE Linearity Characterization
(P
OUT
= 10 W, f = 1.840 GHz, V
DS
= 26 V, I
DQ
= 300 mA)
Modulation spectrum @ ±400 kHz
Modulation spectrum @ ±600 kHz
—
P1dB
IRL
—
—
Input Return Loss
Output Power
(V
DS
= 26 V, 1 dB gain compression, I
DQ
= 300 mA)
—
–64
33
–71
—
—
—
—
dBc
W
dBc
Ruggedness
(V
DS
= 26 V, P
OUT
= 30 W, I
DQ
= 300 mA,
VSWR = 10:1 [all angles])
* Across full DCS band, 1.805 GHz—1.880 GHz.
No degradation in output
power.
–12
dB
.
AGR18030EF
30 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor
Test Circuit Illustrations for AGR18030EF
FB1
V
GG
C4
C3
Z1
RF INPUT
C1
R1
Z14
C6
C7
C8
C9
C10
V
DD
Z13
Z2
C2
Z3
Z4
Z5
Z6
Z7 2
1
3
Z8
DUT
C11
Z9
Z10
Z11
C5
Z12
RF OUTPUT
PINS: 1. DRAIN, 2. SOURCE, 3. GATE
A. Schematic
Parts List:
Microstrip line: Z1 0.510 in. x 0.066 in.; Z2 0.364 in. x 0.066 in.; Z3 0.151 in. x 0.066 in.; Z4 0.151 in. x 0.155 in.; Z5 0.085 in. x 0.066 in.;
Z6 0.245 in. x 0.540 in.; Z7 0.182 in. x 0.644 in.; Z8 0.052 in. x 0.390 in.; Z9 0.309 in. x 0.539 in.; Z10 0.102 in. x 0.539 in. to 0.125 in. taper;
Z11 0.454 in. x 0.125 in.; Z12 0.769 in. x 0.066 in.; Z13 0.050 in. x 0.560 in.; Z14 0.050 in. x 0.560 in.
ATC
®
chip capacitors: C1, C9: 8.2 pF, 100B8R2JW500X; C2, C6: 6.8 pF, 100B6R8JW500X.
Vitramon
®
chip capacitors: C3, C7: 22,000 pF.
Sprague
®
tantalum surface-mount chip capacitors: C4, C10: 22 µF, 35 V.
Murata
®
chip capacitor: C8: 0.01 µF, GRM40X7R103K100AL.
Kemet
®
1206 chip capacitor: C9: 0.1 µF, C1206104K5RAC7800.
Johanson-GigaTrim
®
capacitor: C11: 0.4 pF—2.5 pF, 27281SL.
Fair-Rite
®
ferrite bead: FB1: 2743019447.
Resistor: R1: 12 .
Taconic
®
ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5.
B. Component Layout
Figure 2. AGR18030EF Test Circuit
Microcontroller MCU
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