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MC10H603FNG

Description
Translation - Voltage Levels BBG ECL TRNSLTR 9BIT
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size110KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC10H603FNG Overview

Translation - Voltage Levels BBG ECL TRNSLTR 9BIT

MC10H603FNG Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeQLCC
package instructionLEAD FREE, PLASTIC, LCC-28
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
maximum delay12 ns
Interface integrated circuit typeECL TO TTL TRANSLATOR
JESD-30 codeS-PQCC-J28
JESD-609 codee3
length11.505 mm
Nominal negative supply voltage-5.2 V
Number of digits1
Number of functions9
Number of terminals28
Maximum operating temperature85 °C
Minimum operating temperature
Output characteristics3-STATE
Output latch or registerLATCH
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC28,.5SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)260
power supply5,-5.2 V
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyECL
Temperature levelOTHER
Terminal surfaceTin (Sn)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
width11.505 mm
Base Number Matches1
MC10H603, MC100H603
9−Bit Latch ECL to TTL
Translator
Description
The MC10H/100H603 is a 9−bit, dual supply ECL to TTL
translator. Devices in the ON Semiconductor 9−bit translator series
utilize the 28−lead PLCC for optimal power pinning, signal
flow−through and electrical performance.
The devices feature a 48 mA TTL output stage, and AC
performance is specified into both a 50 pF and 200 pF load
capacitance. Latching is controlled by Latch Enable (LEN), and
Master Reset (MR) resets the latches. A HIGH on OEECL sends the
outputs into the high impedance state. All control inputs are ECL
level.
The 10H version is compatible with MECL 10Ht ECL logic levels.
The 100H version is compatible with 100K levels.
Features
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
9−Bit Ideal for Byte−Parity Applications
3−State TTL Outputs
Flow−Through Configuration
Extra TTL and ECL Power Pins to Minimize Switching Noise
Dual Supply
6.0 ns Max Delay into 50 pF, 12 ns into 200 pF
(all Outputs Switching)
PNP TTL Inputs for Low Loading
Pb−Free Packages are Available*
MARKING DIAGRAM*
1
MCxxxH603G
AWLYYWW
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
November, 2006
Rev. 10
1
Publication Order Number:
MC10H603/D

MC10H603FNG Related Products

MC10H603FNG MC10H603FNR2 MC100H603FNR2
Description Translation - Voltage Levels BBG ECL TRNSLTR 9BIT Translation - Voltage Levels 9-Bit ECL to TTL Translation - Voltage Levels 9-Bit ECL to TTL
Is it Rohs certified? conform to incompatible incompatible
Maker ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code QLCC QLCC QLCC
package instruction LEAD FREE, PLASTIC, LCC-28 PLASTIC, LCC-28 QCCJ, LDCC28,.5SQ
Contacts 28 28 28
Reach Compliance Code unknown not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99
maximum delay 12 ns 12 ns 12 ns
Interface integrated circuit type ECL TO TTL TRANSLATOR ECL TO TTL TRANSLATOR ECL TO TTL TRANSLATOR
JESD-30 code S-PQCC-J28 S-PQCC-J28 S-PQCC-J28
JESD-609 code e3 e0 e0
length 11.505 mm 11.505 mm 11.505 mm
Nominal negative supply voltage -5.2 V -5.2 V -4.5 V
Number of digits 1 1 1
Number of functions 9 9 9
Number of terminals 28 28 28
Maximum operating temperature 85 °C 85 °C 85 °C
Output characteristics 3-STATE 3-STATE 3-STATE
Output latch or register LATCH LATCH LATCH
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ QCCJ
Encapsulate equivalent code LDCC28,.5SQ LDCC28,.5SQ LDCC28,.5SQ
Package shape SQUARE SQUARE SQUARE
Package form CHIP CARRIER CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) 260 240 240
power supply 5,-5.2 V 5,-5.2 V 5,-4.5 V
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 4.57 mm 4.57 mm 4.57 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V
surface mount YES YES YES
technology ECL ECL ECL
Temperature level OTHER OTHER OTHER
Terminal surface Tin (Sn) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form J BEND J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm 1.27 mm
Terminal location QUAD QUAD QUAD
Maximum time at peak reflow temperature 40 30 30
width 11.505 mm 11.505 mm 11.505 mm
Is Samacsys N N -
Base Number Matches 1 1 -
Humidity sensitivity level - 1 1
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