V FPGAs include innovations such as an enhanced core architecture, integrated
transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual
property (IP) blocks.
With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:
• Bandwidth-centric applications and protocols, including PCI Express
®
(PCIe
®
) Gen3
• Data-intensive applications for 40G/100G and beyond
• High-performance, high-precision digital signal processing (DSP) applications
Stratix V devices are available in four variants (GT, GX, GS, and E), each targeted for a different set of
applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-
risk, low-cost path to HardCopy
®
V ASICs.
Related Information
Stratix V Device Handbook: Known Issues
Lists the planned updates to the
Stratix V Device Handbook
chapters.
Stratix V Family Variants
The Stratix V device family contains the GT, GX, GS, and E variants.
Stratix V GT
devices, with both 28.05-Gbps and 12.5-Gbps transceivers, are optimized for applications
that require ultra-high bandwidth and performance in areas such as 40G/100G/400G optical communica‐
tions systems and optical test systems. 28.05-Gbps and 12.5-Gbps transceivers are also known as GT and
GX channels, respectively.
Stratix V GX
devices offer up to 66 integrated transceivers with 14.1-Gbps data rate capability. These
transceivers also support backplane and optical interface applications. These devices are optimized for
high-performance, high-bandwidth applications such as 40G/100G optical transport, packet processing,
and traffic management found in wireline, military communications, and network test equipment
markets.
Stratix V GS
devices have an abundance of variable precision DSP blocks, supporting up to 3,926 18x18
or 1,963 27x27 multipliers. In addition, Stratix V GS devices offer integrated transceivers with 14.1-Gbps
data rate capability. These transceivers also support backplane and optical interface applications. These
devices are optimized for transceiver-based DSP-centric applications found in wireline, military,
broadcast, and high-performance computing markets.
2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html.
Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
I downloaded the source code of "51+sl811 read and write USB flash drive source program + schematic diagram" from the Internet, but I can't find the schematic diagram. Can anyone send me a copy or tel...
[i=s]This post was last edited by paulhyde on 2014-9-15 03:14[/i] [align=center] [align=left] [align=center][b][size=6]2013 Electrical Design and Control Competition Questions Concept and Analysis[/si...
Investment analysis on direct-insert LED, SMD LED and high-power LED
Since many friends have asked me recently about investing in the above three types of LEDs, I would like to share some opinions:
1....
[i=s]This post was last edited by Yijianzhangqiankun on 2014-12-21 12:17[/i] I have read several great posts. They have run routines and started testing and development, which inspired me a lot. I dar...
I only found the KInterrupt class: But the problem is as follows KInterrupt::Initialize has two formats FORM 2: (WDM) VOID Initialize( KIRQL irql, ULONG vector, KINTERRUPT_MODE Mode, BOOLEAN bShareVec...
What is wrong with keil4? The target is always not established. How to correct it?
Note: A new project has been created, a new file has been created (the file is named .c), and the source group has be...
Embedded System
京公网安备 11010802033920号
EEWORLD
