U3760MB
Low-Voltage Standard Telephone Circuit
Description
TEMIC’s low-voltage telephone circuit, U3760MB,
performs all the speech and line interface functions
required in an electronic telephone set tone ringer, pulse
and DTMF dialing with redial.
Electrostatic sensitive device.
Observe precautions for handling.
Features
Speech Circuit
D
Adjustable dc characteristic
D
Symmetrical input of microphone amplifier
D
Receiving amplifier for dynamic or piezo-electric
earpieces
D
Automatic line-loss compensation
Dialer
D
D
D
D
Selectable flashing duration by key pad
Pause function
Last number redial up to 32 digits
Standard low-cost 3.58-MHz crystal or ceramic
resonator
Tone Ringer
D
DTMF / pulse switchable
D
Pulse dialing 66/33 or 60/40 for 10 ppS and 20 ppS or
DTMF dialing selectable by pins
D
Two-tone ringer
D
Adjustable volume
D
RC oscillator
D
Adjustable threshold
D
Key tone
Benefits
D
Low number of external components
D
High quality through one-IC solution
D
One IC for all standards
Ordering Information
Extended Type Number
U3760MB-MSD
U3760MB-MFN
U3760MB-MFNG3
Package
SDIP40
SSO44
SSO44
Remarks
Taped and reeled
Rev. A3, 19-Feb-98
1 (19)
5V1
1M
220 k
Tip
HKS
5M
470
1
m
220 k
HKS
BC546
EP
18 k
3k
MPSA42
22 k
220 n
2n2
HKS
Microphone –
amplifier +
Control
function
2.4 k
Sidetone
amplifier
3n3
ST
Pulse
control
logic
Supply current
regulator
Control
function
Receiver
attenuation RECIN
2.2
m
Receiving
amplifier
RECO1
100
RECO2
AGC 12 k
RDC 39
VBG 1 W
VI
VRING
Supply
Power-on-reset
VRIAC
OUT
Tone signal
generator
10 k
28 V
10
m
390
100
m
1.8 k
47 n
EP
Mute control
Transmit
amplifier
VL
680
MODE
BM
KT DP VDD2
VDD1 MFO
MIC1
MIC2 MICO
TIN
CL
13 V
1W
330
2N5401
33 k
220
m
75V
470 k
47 n
5k
3.58 MHz
ÁÁ
ÁÁ
Ring
10 k
U3760MB
100 n
100 n
XT
XT
Clock
generator
C1
Block Diagram / Applications
C2
C3
K
e
y
b
o
a
r
d
RAM
l
o
g
i
c
Read – write
counter
C
o
n
t
r
o
l
1
2
3 F1
R1
4
5
6 F2
R2
Figure 1.
AGC current
generator
D/A
converter
Data
latch &
decoder
ROW & column
programmable
counter
Clock signal
oscillator
Divider
Divider
Bandgap
reference
Comparator
with hysteresis
7
8
9 F3
R3
*/T 0
# R/P
R4
i
n
t
e
r
f
a
c
e
Location
latch
PRIVACY
47 n
MUTE
1n
RCK
150 k
THA
GND1
GND2
8176
ÁÁ
2 (19)
220 k
Rev. A3, 19-Feb-98
U3760MB
SDIP40
C1
C2
C3
KT
XT
XT
MFO
GND 2
GND 1
1
2
3
4
5
6
7
8
9
40
39
38
37
36
35
34
33
C1 1
C2 2
C3 3
n.c. 4
n.c. 5
n.c. 6
MODE
KT 7
BM
XT 8
HKS
XT 9
32 VDD 2
MFO 10
MIC 1 10
MIC 2 11
31 VDD 1
GND 2 11
30
OUT
GND 1 12
29
28
RCK
MIC 1 13
VL 13
RDC 14
n.c. 15
TIN 16
VI 17
MUTE 18
VBG 19
RECIN 20
10181
SSO44
44
43
42
41
40
39
38
37
36
35
34
R4
R3
R2
R1
n.c.
DP
MODE
BM
HKS
n.c.
VDD 2
VDD 1
OUT
R4
R3
R2
R1
DP
U3760MB
33
32
U3760MB
MICO 12
VRING
MIC 2 14
MICO 15
VL 16
RDC 17
TIN 18
VI 19
MUTE 20
VBG 21
RECIN 22
10180
31 RCK
30 VRING
29 VRIAC
28
AGC
27 VRIAC
26 AGC
25 THA
24 ST
23 PRIVACY
22 RECO 1
21 RECO 2
27 THA
26 ST
25
24
23
PRIVACY
RECO 1
RECO 2
Rev. A3, 19-Feb-98
3 (19)
U3760MB
Pin Description
PD means protection device
SDIP40
1
SSO44
1
Symbol
C1
Function
Keyboard input
C1
PD
Configuration
2
2
C2
C2
PD
3
3
C3
C3
PD
15
4
4, 5,
6, 35
7
n.c.
KT
Not connected
Key tone signal output generated
for all keys in pulse dialing mode
(except Flash + Redial) with a fre-
quency of about 1240 Hz and dura-
tion about 50 ms
A built-in inverter provides
oscillation with an inexpensive
3.579545-MHz crystal or ceramic
resonator
XT
PD
KT
5
8
XT
6
9
XT
XT
40P
PD
40P
7
10
MFO
Output of DTMF
DTMF output frequency
Specified Actual
(HZ)
(Hz)
R1
697
699
R2
770
766
R3
852
848
R4
941
948
C1
1209
1216
C2
1336
1332
C3
1477
1472
Error
(%)
+0.28
–0.52
–0.47
+0.74
+0.57
–0.30
–0.34
MFO
9
8
12
11
GND 1
GND 2
Ground 1 connected with ground 2
4 (19)
Rev. A3, 19-Feb-98
U3760MB
SDIP40
10
SSO44
13
Symbol
MIC 1
1V
50K
MIC1
11
14
MIC 2
12
15
MICO
Transmit pre-amp output which is
normally capacitively coupled to
Pin TIN
MICO
PD
13
16
VL
Positive supply voltage input to the
device. The current through this
pin is modulated by the transmit
signal.
VL
PD
16V
RDC
14
17
RDC
AGC
PD
RDC
1V
16
18
TIN
Input to the line output driver am-
plifier. Transmit AGC is applied to
this stage.
This internal voltage bias line must
be connected to VL via an external
resistor, R
B
, which dominates the
ac input impedance of the circuit
and should be 680
Ω
for 600-
W
input impedance or 1.2 kΩ for a
900-Ω input impedance.
5.6K
TIN
PD
16V
17
19
V
I
VI
16V
PD
Rev. A3, 19-Feb-98
Ê
ÊÊ
ÊÊ
Ê
An external resistor (1 W) is
required from this pin to GND to
control the dc input impedance of
the circuit. It has a nominal value
of 39
W
for low-voltage operation.
Values up to 100
W
may be used to
increase the available transmit
output voltage swing at the expense
of low-voltage operation.
Ê Ê
Ê
Ê
Ê
Non-inverting input of microphone
amplifier
MIC2
50K
1V
VI
Ê
VI
Function
Inverting input of microphone
amplifier
Configuration
PD
PD
VI
1V
16K
PD
VL
PD
5 (19)
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