PIN FUNCTION DESCRIP TION ...................................................................................................................................................9
DC, AC AND TIMING CHARACTERISTICS .........................................................................................................................23
W65C02DB DEVELOPER BOARD AND .................................................................................................................................37
HARD CORE MODEL .....................................................................................................................................................................39
SOFT CORE RTL MODEL ........................................................................................................................................................39
PIN FUNCTION TABLE..................................................................................................................................................12
INSTRUCTION SET TABLE .........................................................................................................................................21
ABSOLUTE MAXIMUM RATINGS ............................................................................................................................23
DC CHARACTERISTICS................................................................................................................................................24
AC CHARACTERISTICS ..............................................................................................................................................25
OPERATION, OPERATION CODES AND STATUS REGISTER.....................................................................28
IDD VS VDD .....................................................................................................................................................................24
F MAX VS VDD...............................................................................................................................................................24
GENERAL TIMING DIAGRAM ................................................................................................................................26
The Western Design Center, Inc.
W65C02S Data Sheet
4
The Western Design Center, Inc.
W65C02S Data Sheet
1 INTRODUCTION
The W65C02S is a low power cost sensitive 8-bit microprocessor. The W65C02S is a fully static core and the PHI2 clock
can be stopped when it is in the high (logic 1) or low (logic 0) state. The variable length instruction set and manually
optimized core size makes the W65C02S an excellent choice for low power System-on-Chip (SoC) designs. The Verilog
RTL model is available for ASIC design flows. WDC, a Fabless Semiconductor Company, provides packaged chips for
evaluation or volume production. To aid in system development, WDC provides a Development System that includes a
W65C02DB Developer Board, an In-Circuit Emulator (ICE) and the W65cSDS Software Development System, see
www.westerndesigncenter.com for more information.
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Features of the W65C02S
8-bit data bus
16-bit address bus provides access to 65,536 bytes of memory space
8-bit ALU, Accumulator, Stack Pointer, Index Registers, Processor Status Register
16-bit Program Counter
69 instructions
16 addressing modes
212 Operation Codes (OpCodes)
Vector Pull (VPB) output indicates when interrupt vectors are being addressed
WAit-for-Interrupt (WAI) and SToP (STP) instructions reduce power consumption, decrease interrupt latency and
provide synchronization with external events
Variable length instruction set provides for lower power and smaller code optimization over fixed length instruction
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