ZXMHN6A07T8
60V N-CHANNEL MOSFET H-BRIDGE
SUMMARY
V
(BR)DSS
= 60V : R
DS(on)
= 0.3 ; I
D
= 1.6A
DESCRIPTION
This new generation of trench MOSFETs from Zetex
utilizes a unique structure that combines the benefits of
low on-resistance with fast switching speed. This
makes them ideal for high efficiency, low voltage,
power management applications.
FEATURES
·
Compact package
·
Low on state losses
·
Low drive requirements
·
Operates up to 60V
·
1 Amp continuous rating
SM8
APPLICATIONS
·
Motor control
ORDERING INFORMATION
DEVICE
ZXMHN6 A0 7 T8 TA
ZXMHN6 A0 7 T8 TC
REEL
SIZE
7”
13”
TAPE
WIDTH
12mm
12mm
QUANTITY PER
REEL
1,000 units
4,000 units
PINOUT
DEVICE MARKING
·
ZXMH
N6A07
TOP VIEW
ISSUE 2 - MAY 2004
1
SEMICONDUCTORS
ZXMHN6A07T8
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Drain-source voltage
Gate-source voltage
Continuous drain current (V
GS
= 1 0 V; T
A
= 2 5 ° C)
(b) (d)
(V
GS
= 1 0 V; T
A
= 7 0 ° C)
(V
GS
= 1 0 V; T
A
= 2 5 ° C)
(a) (d)
Pulsed drain current
(c)
Continuous source current (body diode)
(b) (d)
Pulsed source current (body diode)
(c)
Total power dissipation at T
A
= 2 5 ° C
Any Single transistor " on"
(a) (d)
Single transistor ‘ on’
(b) (d)
Two transistors ‘ on’ equally
Single transistor " on"
(a) (d)
Single transistor ‘ on’
(b) (d)
(a) (e)
(a) (e)
(b) (d)
SYMBOL
V
DSS
V
GS
I
D
LIMIT
60
± 20
1.6
1.3
1.4
UNIT
V
V
A
A
A
A
A
A
I
DM
I
S
I
SM
P
TOT
9
1
9
1.1
1.4
1.6
W
W
W
Linear derating factor above 2 5 ° C
(a)
8.8
11.2
13.2
R
th(j-amb)
114
89
(a) (e)
mW/° C
mW/° C
mW/° C
Two transistors ‘ on’ equally
(a) (d)
(b) (d)
Thermal resistance - junction to ambient
Single transistor " on"
Single transistor " on"
° C/W
° C/W
° C/W
°C
Two transistors ‘ on’ equally
76
T
j
, T
stg
-55 to + 150
Operating and storage temperature range
(a) For a device mounted on 50mm x 50mm x 1.6mm FR4 PCB with a high coverage of single sided 2oz weight copper in still air conditions with the
heat sink split into three equal areas, one for each drain connection.
(b) For a device surface mounted on a FR4 PCB at t = 10 sec.
(c) Repetitive rating on 50mm x 50mm x 1.6mm FR4 PCB, duty cycle 2% , pulse width 300 S in still air conditions with the heat sink split into three
equal areas, one for each drain connection.
(d) For device with one active die.
(e) For any two die not sharing the same drain connection.
ISSUE 2 - MAY 2004
SEMICONDUCTORS
2
ZXMHN6A07T8
ELECTRICAL CHARACTERISTICS
(at T
amb
= 25° C unless otherwise stated)
PARAMETER
STATIC
Drain-source breakdown voltage
Zero gate voltage drain current
Gate-body leakage
Gate-source threshold voltage
Static drain-source on-state
resistance
(1 )
Forward transconductance
DYNAMIC
(3 )
(1 ) (3 )
SYMBOL
MIN.
TYP.
MAX.
UNIT CONDITIONS
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
V
SD
t
rr
Q
rr
60
1.0
100
1.0
3.0
0.3
0.45
2.3
V
A
nA
V
I
D
= 2 5 0 A, V
GS
= 0 V
V
DS
= 6 0 V , V
GS
= 0 V
V
GS
= ± 2 0 V , V
DS
= 0 V
I
D
= 2 5 0 A, V
DS
= V
GS
V
GS
= 1 0 V , I
D
= 1 . 8 A
V
GS
= 4 . 5 V , I
D
= 1 . 3 A
V
DS
= 1 5 V , I
D
= 1 . 8 A
S
Input capacitance
Output capacitance
Reverse transfer capacitance
SWITCHING
(2 ) (3 )
166
20
9
pF
pF
pF
V
DS
= 4 0 V , V
GS
= 0 V
f= 1 MHz
Turn-on-delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate drain charge
SOURCE-DRAIN DIODE
Diode forward voltage
(1 )
Reverse recovery time
(3 )
1.8
1.4
4.9
2.0
3.2
0.7
0.8
ns
ns
ns
ns
nC
nC
nC
V
DS
= 3 0 V , V
GS
= 1 0 V
I
D
= 1 . 8 A
V
DD
= 3 0 V , I
D
= 1 . 8 A
R
G
@
6 . 0
W,
V
GS
= 1 0 V
0.95
21
21
V
ns
nC
T
j
= 2 5 ° C, I
S
= 0 . 4 5 A,
V
GS
= 0 V
T
j
= 2 5 ° C, I
F
= 1 . 0 A,
di/ dt= 1 0 0 A/ s
Reverse recovery charge
(3 )
NOTES
(1) Measured under pulsed conditions. Pulse width 300 s; duty cycle 2% .
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 2 - MAY 2004
SEMICONDUCTORS
4
FPGA/CPLD
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