a
FEATURES
Ideal xDSL Line Driver for VoDSL or Low Power
Applications such as USB, PCMCIA, or PCI Based
Customer Premise Equipment (CPE)
High Output Voltage and Current Drive
340 mA Output Drive Current
Low Power Operation
3 V to 12 V Power Supply Range
1-Pin Logic Controlled Standby, Shutdown
Low Supply Current of 19 mA (Typical)
Low Distortion
–82 dBc SFDR, 12 V p-p into Differential 21 @ 100 kHz
4.5 nV/√Hz Input Voltage Noise Density, 100 kHz
Out-of-Band SFDR = –72 dBc, 144 kHz to 500 kHz,
Z
LINE
= 100 , P
LINE
= 13.5 dBm
High Speed
40 MHz Bandwidth (–3 dB)
375 V/ s Slew Rate
APPLICATIONS
VoDSL Modems
xDSL USB, PCI, PCMCIA Cards
Line Powered or Battery Backup xDSL Modems
xDSL Line Driver
3 V to 12 V with Power-Down
AD8391
PIN CONFIGURATION
8-Lead SOIC
(Thermal Coastline)
V
MID
IN1
1
PWDN
2
+V
S 3
V
OUT
1
4
V
S
V
S
8
7
6
5
IN2
V
MID
–V
S
V
OUT
2
PRODUCT DESCRIPTION
O
The AD8391 provides a flexible power-down feature consisting of
a 1-pin digital control line. This allows biasing of the AD8391 to
full power (Logic 1), standby (Logic three-state maintains low
amplifier output impedance), and shutdown (Logic 0 places
amplifier outputs in a high impedance state). PWDN is refer-
enced to –V
S
.
Fabricated on ADI’s high speed XFCB process, the high bandwidth
and fast slew rate of the AD8391 keep distortion to a minimum,
while dissipating a minimum of power. The quiescent current of the
AD8391 is low: 19 mA total static current draw. The AD8391
comes in a compact 8-lead SOIC “thermal coastline” package and
operates over the temperature range –40°C to +85°C.
B
UPSTREAM POWER – 10dB/DIV
The AD8391 consists of two parallel, low cost xDSL line drive
amplifiers capable of driving low distortion signals while running on
both 3 V to 12 V single-supply or equivalent dual-supply rails. It is
primarily intended for use in single-supply xDSL systems where low
power is essential, such as line powered and battery backup systems.
Each amplifier output drives more than 250 mA of current while
maintaining –82 dBc of SFDR at 100 kHz on 12 V, outstanding
performance for any xDSL CPE application.
SO
LE
EMPTY BIN
25
137.5
FREQUENCY – kHz
250
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
TE
AD8391
Figure 1. Upstream Transit Spectrum with Empty Bin
at 45 kHz; Line Power = 12.5 dBm into 100
Ω
AD8391–SPECIFICATIONS
Parameter
Conditions
(@ 25 C, V
S
= 12 V, R
L
= 10 , V
MID
= V
S
/2, G = –2, R
F
= 909 , R
G
= 453
unless otherwise noted. See TPC 1 for Basic Circuit Configuration.)
Min
Typ
Max
,
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth
0.1 dB Bandwidth
Large Signal Bandwidth
Slew Rate
Rise and Fall Time
Settling Time
NOISE/HARMONIC
PERFORMANCE
Distortion, G = –5 (R
G
= 178
Ω)
Second Harmonic
Third Harmonic
MTPR (In-Band)
SFDR (Out-of-Band)
Input Noise Voltage
Input Noise Current
Crosstalk
DC PERFORMANCE
Input Offset Voltage
G = –1, V
OUT
< 0.4 V p-p, R
G
= 909
Ω
G = –2, V
OUT
< 0.4 V p-p
V
OUT
< 0.4 V p-p
V
OUT
= 4 V p-p
V
OUT
= 4 V p-p
V
OUT
= 4 V p-p
0.1%, V
OUT
= 2 V p-p
40
38
4
50
375
8
60
MHz
MHz
MHz
MHz
V/µs
ns
ns
LE
0.1
16
3.0
–V
S
+ 2.0
–2–
V
MID
= +V
S
/2
T
MIN
to T
MAX
V
MID
= Float
TE
±
2
±
3
±
2
±
0.25
±
0.35
10
±
15
±
2.6
125
2.5
10
±
0.5
±
6
48
1.2 to 10.8
±
5
±
30
2.5
10
0.3
3
11.9
340
1500
19
22
10
4
55
21
6
12
±
300
200
–V
S
+ 0.8
V
OUT
= 8 V p-p (Differential)
100 kHz, R
L
= 21
Ω
100 kHz, R
L
= 21
Ω
25 kHz to 138 kHz, R
L
= 21
Ω
144 kHz to 500 kHz, R
L
= 21
Ω
f = 100 kHz Differential
f = 100 kHz
f = 1 MHz, G = –2, Output to Output
–82
–95
–70
–72
4.5
9
64
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
dB
mV
mV
mV
mV
mV
MΩ
Ω
µA
µA
dB
V
mV
kΩ
pF
Ω
kΩ
V
mA
mA
mA
mA
mA
mA
V
dB
V
V
µA
ns
Input Offset Voltage Match
Transimpedance
INPUT CHARACTERISTICS
Input Resistance
Input Bias Current
Input Bias Current Match
CMRR
Input CM Voltage Range
V
MID
Accuracy
V
MID
Input Resistance
V
MID
Input Capacitance
T
MIN
to T
MAX
∆V
OUT
= 5 V
POWER SUPPLY
Supply Current
O
OUTPUT CHARACTERISTICS
Output Resistance
Output Resistance
Output Voltage Swing
Linear Output Current
Short-Circuit Current
STBY Supply Current
SHUTDOWN Supply Current
Operating Range
Power Supply Rejection Ratio
LOGIC INPUT (PWDN)
Logic 1 Voltage
Logic 0 Voltage
Logic Input Bias Current
Turn-On Time
Specifications subject to change without notice.
B
SO
V
MID
= Float Delta from +V
S
/2
PWDN = 1
T
MIN
to T
MAX
PWDN = Open or Three-State
PWDN = 0
Single Supply
V
MID
= V
S
/2,
∆V
S
=
±
0.5 V
R
L
= 21
Ω,
I
S
= 90% of Typical
In1, In2 pins
In1 – In2
V
MID
= V
IN
= 5.5 V to 6.5 V,
∆V
OS
/∆V
IN
, cm
Frequency = 100 kHz, PWDN 1
Frequency = 100 kHz, PWDN 0
R
LOAD
= 100
Ω
SFDR < –75 dBc, f = 100 kHz, R
L
= 21
Ω
REV. A
AD8391
SPECIFICATIONS
Parameter
(@ 25 C, V
S
= 3 V, R
L
= 10 , V
MID
= V
S
/2, G = –2, R
F
= 909
See TPC 1 for Basic Circuit Configuration.)
Conditions
, R
G
= 453
, unless otherwise noted.
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth
0.1 dB Bandwidth
Large Signal Bandwidth
Slew Rate
Rise and Fall Time
Settling Time
NOISE/HARMONIC
PERFORMANCE
Distortion
Second Harmonic
Third Harmonic
Input Noise Voltage
Input Noise Current
DC PERFORMANCE
Input Offset Voltage
G = –1, V
OUT
< 0.4 V p-p
G = –2, V
OUT
< 0.4 V p-p
V
OUT
< 0.4 V p-p
V
OUT
= 2 V p-p
V
OUT
= 2 V p-p
Differential, V
OUT
= 1 V p-p
0.1%, V
OUT
= 2 V p-p
37
36
3.5
30
50
15
110
MHz
MHz
MHz
MHz
V/µs
ns
ns
TE
–81
–97
4.5
9
±
3
±
4
±
3
±
0.1
±
0.2
8
0.2
9
0.1
125
1000
13
16
19
8
1
55
–V
S
+ 2.0
3.0
±
60
200
V
OUT
= 4 V p-p (Differential)
100 kHz, R
L
= 21
Ω
100 kHz, R
L
= 21
Ω
f = 100 kHz Differential
f = 100 kHz
V
MID
= +V
S
/2
T
MIN
to T
MAX
V
MID
= Float
T
MIN
to T
MAX
∆V
OUT
= 1 V
dBc
dBc
nV/√Hz
pA/√Hz
mV
mV
mV
mV
mV
MΩ
Ω
µA
µA
dB
V
mV
kΩ
pF
Ω
kΩ
V
mA
mA
mA
mA
mA
mA
V
dB
V
V
µA
ns
±
15
LE
–3–
Input Offset Voltage Match
Transimpedance
INPUT CHARACTERISTICS
Input Resistance
Input Bias Current
Input Bias Current Match
CMRR
Input CM Voltage Range
V
MID
Accuracy
V
MID
Input Resistance
V
MID
Input Capacitance
±
2.6
POWER SUPPLY
Supply Current
O
OUTPUT CHARACTERISTICS
Output Resistance
Output Resistance
Output Voltage Swing
Linear Output Current
Short-Circuit Current
B
SO
In1, In2 pins
In1 – In2
V
MID
= V
IN
= 1.3 V to 1.5 V,
∆V
OS
/∆V
IN
, cm
V
MID
= Float, Delta from +V
S
/2
125
1
7
±
0.5
±
4
48
1.2 to 2.1
±
5
±
30
2.5
10
Frequency = 100 kHz, PWDN 1
Frequency = 100 kHz, PWDN 0
R
L
= 100
Ω
SFDR < –82 dBc, f = 100 kHz, R
L
= 21
Ω
2.9
STBY Supply Current
SHUTDOWN Supply Current
Operating Range
Power Supply Rejection Ratio
PWDN = 1
T
MIN
to T
MAX
PWDN = Open or Three-State
PWDN = 0
Single Supply
V
MID
= V
S
/2,
∆V
S
=
±
0.5 V
18
2
12
LOGIC INPUTS (PWDN [1,0])
Logic 1 Voltage
Logic 0 Voltage
Logic Input Bias Current
Turn-On Time
Specifications subject to change without notice.
–V
S
+ 0.8
R
L
= 21
Ω,
I
S
= 90% of Typical
REV. A
AD8391
ABSOLUTE MAXIMUM RATINGS
1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation
2
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . .
±
V
S
Logic Voltage, PWDN . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Output Short-Circuit Duration
. . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curve
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device on a 4-layer board in free air at 85°C: 8-Lead SOIC
package:
JA
= 100°C/W.
The maximum power that can be safely dissipated by the
AD8391 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for a plastic encapsu-
lated device is determined by the glass transition temperature of
the plastic, approximately 150°C. Temporarily exceeding this
limit may cause a shift in parametric performance due to a change
in the stresses exerted on the die by the package.
To ensure proper operation, it is necessary to observe the maxi-
mum power derating curve.
2.0
T
J
= 150 C
MAXIMUM POWER DISSIPATION – W
1.5
8-LEAD SOIC PACKAGE
LE
SO
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–4–
ORDERING GUIDE
TE
1.0
0.5
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70
AMBIENT TEMPERATURE – C
80 90
Figure 2. Plot of Maximum Power Dissipation
vs. Temperature
Model
Package
Description
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
Evaluation Board
Package
Option
R-8
R-8
R-8
AD8391AR
AD8391AR–REEL
AD8391AR–REEL7
AD8391AR–EVAL
O
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8391 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
B
REV. A
Typical Performance Characteristics–AD8391
0.4
C
F
0.3
C
F
= 0pF
V
S
= 1.5V
G = –2
R
L
= 10
R
G
V
IN
R
F
R
L
~
0.1 F
0.1 F
0.1 F
OUTPUT VOLTAGE – V
V
OUT
0.2
0.1
C
F
= 3pF
0
–0.1
–0.2
V
MID
+
+
+V
S
6.8 F
6.8 F
–V
S
–0.3
–0.4
0
25
50
75
100
125
150
175
200
225
250
TIME – ns
TPC 1. Single-Ended Test Circuit
0.4
0.3
C
F
= 0pF
0.2
OUTPUT VOLTAGE – V
TE
2.0
1.5
C
F
= 0pF
1.0
OUTPUT VOLTAGE – V
0.5
0
C
F
= 3pF
–0.5
–1.0
–1.5
–2.0
0
25
50
75
100
125
150
TPC 4. Small Signal Step Response
V
S
= 6V
G = –2
R
L
= 10
V
S
= 1.5V
G = –2
R
L
= 10
0.1
0
–0.1
–0.2
–0.3
–0.4
0
C
F
= 3pF
SO
100
125
150
175
200
225
250
TIME – ns
C
F
= 0pF
V
S
= 6V
G = –2
R
L
= 10
C
F
= 3pF
LE
0.01
0.008
0.006
OUTPUT ERROR – V
25
50
75
175
200
225
250
TIME – ns
TPC 2. Small Signal Step Response
TPC 5. Large Signal Step Response
B
4
3
2
V
S
=
G = –2
6V
OUTPUT VOLTAGE – V
0.004
0.002
0
–0.002
OUTPUT ERROR
–0.004
–0.006
V
IN
= 1V p-p
O
1
0
–1
–2
–3
–4
0
25
50
75
100
125
150
175
200
225
250
TIME – ns
–0.008
–0.01
0
50
100
150
TIME – ns
200
250
300
TPC 3. Large Signal Step Response
TPC 6. 0.1% Settling Time
REV. A
–5–
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