AM29F017D-120E4C datasheet, PDF

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AM29F017D-120E4C: Description16 Megabit (2 M x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory; Categorystorage storage; File Size703KB，44 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

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AM29F017D-120E4C Overview

16 Megabit (2 M x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory

AM29F017D-120E4C Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SPANSION
Parts packaging code	TSOP1
package instruction	MO-142CD, TSOP-40
Contacts	40
Reach Compliance Code	_compli
ECCN code	EAR99
Maximum access time	120 ns
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
JESD-30 code	R-PDSO-G40
JESD-609 code	e0
length	18.4 mm
memory density	16777216 bi
Memory IC Type	FLASH
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of departments/size	32
Number of terminals	40
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Encapsulate equivalent code	TSSOP40,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	64K
Maximum standby current	0.000005 A
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
switch bit	YES
type	NOR TYPE
width	10 mm

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Am29F017D

Data Sheet

July 2003

The following document specifies Spansion memory products that are now offered by both Advanced

Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-

inally developed the specification, these products will be offered to customers of both AMD and

Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal datasheet improvement and are noted in the

document revision summary, where supported. Future routine revisions will occur when appropriate,

and changes will be noted in a revision summary.

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order

these products, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion

memory solutions.

Publication Number

21195

Revision

Amendment

Issue Date

March 23, 2001

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . .

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . .

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Ordering Information . . . . . . . . . . . . . . . . . . . . . . .

Device Bus Operations . . . . . . . . . . . . . . . . . . . . .

DQ3: Sector Erase Timer ....................................................... 23

Figure 5. Toggle Bit Algorithm........................................................ 23

Table 10. Write Operation Status................................................... 24

Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 25

Figure 6. Maximum Negative Overshoot Waveform ...................... 25

Figure 7. Maximum Positive Overshoot Waveform........................ 25

Table 1. Am29F017D Device Bus Operations .................................. 9

Requirements for Reading Array Data ..................................... 9

Writing Commands/Command Sequences .............................. 9

Program and Erase Operation Status ...................................... 9

Standby Mode ........................................................................ 10

RESET#: Hardware Reset Pin ............................................... 10

Output Disable Mode.............................................................. 10

Table 2. Sector Address Table........................................................ 11

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 25

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26

TTL/NMOS Compatible .......................................................... 26

CMOS Compatible.................................................................. 26

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 8. Test Setup...................................................................... 27

Table 11. Test Specifications ......................................................... 27

Autoselect Mode..................................................................... 12

Table 3. Am29F017D Autoselect Codes (High Voltage Method).... 12

Key to Switching Waveforms. . . . . . . . . . . . . . . . 27

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28

Read-only Operations............................................................. 28

Figure 9. Read Operation Timings ................................................. 28

Sector Group Protection/Unprotection.................................... 12

Table 4. Sector Group Addresses................................................... 12

Hardware Reset (RESET#) .................................................... 29

Figure 10. RESET# Timings .......................................................... 29

Temporary Sector Group Unprotect ....................................... 12

Figure 1. Temporary Sector Group Unprotect Operation................ 13

Erase/Program Operations ..................................................... 30

Figure 11. Program Operation Timings..........................................

Figure 12. Chip/Sector Erase Operation Timings ..........................

Figure 13. Data# Polling Timings (During Embedded Algorithms).

Figure 14. Toggle Bit Timings (During Embedded Algorithms)......

Figure 15. DQ2 vs. DQ6.................................................................

Hardware Data Protection ...................................................... 13

Low V

Write Inhibit ...................................................................... 13

Write Pulse “Glitch” Protection ........................................................ 13

Logical Inhibit .................................................................................. 13

Power-Up Write Inhibit .................................................................... 13

Temporary Sector Unprotect .................................................. 34

Figure 16. Temporary Sector Group Unprotect Timing Diagram ... 34

Common Flash Memory Interface (CFI) . . . . . . . 14

Table 5. CFI Query Identification String .......................................... 14

Table 6. System Interface String..................................................... 14

Table 7. Device Geometry Definition .............................................. 15

Table 8. Primary Vendor-Specific Extended Query ........................ 15

Erase and Program Operations .............................................. 35

Alternate CE# Controlled Writes .................................................... 35

Figure 17. Alternate CE# Controlled Write Operation Timings ...... 36

Command Definitions . . . . . . . . . . . . . . . . . . . . . 16

Reading Array Data ................................................................ 16

Reset Command..................................................................... 16

Autoselect Command Sequence ............................................ 16

Byte Program Command Sequence....................................... 16

Unlock Bypass Command Sequence.............................................. 17

Figure 2. Program Operation .......................................................... 17

Chip Erase Command Sequence ........................................... 17

Sector Erase Command Sequence ........................................ 18

Erase Suspend/Erase Resume Commands........................... 18

Figure 3. Erase Operation............................................................... 19

Command Definitions ............................................................. 20

Table 9. Am29F017D Command Definitions................................... 20

Write Operation Status . . . . . . . . . . . . . . . . . . . . 21

DQ7: Data# Polling................................................................. 21

Figure 4. Data# Polling Algorithm ................................................... 21

RY/BY#: Ready/Busy# ...........................................................

DQ6: Toggle Bit I ....................................................................

DQ2: Toggle Bit II ...................................................................

Reading Toggle Bits DQ6/DQ2 ..............................................

DQ5: Exceeded Timing Limits ................................................

Erase and Programming Performance . . . . . . . . 37

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 37

TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 37

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 38

TS 040—40-Pin Standard Thin Small Outline Package ......... 38

TSR040—40-Pin Reverse Thin Small Outline Package......... 39

TS 048—48-Pin Standard Thin Small Outline Package ......... 40

TSR048—48-Pin Reverse Thin Small Outline Package......... 41

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 42

Revision A (July 1997)............................................................ 42

Revision B (January 1998) ..................................................... 42

Revision B+1 (January 1998) ................................................. 42

Revision B+2 (April 1998)....................................................... 42

Revision B+3 (August 1998)................................................... 42

Revision C (January 1999) ..................................................... 42

Revision C+1 (March 23, 1999).............................................. 42

Revision C+2 (May 17, 1999) ................................................. 42

Revision D (November 16, 1999) ........................................... 42

Revision E (May 19, 2000) ..................................................... 43

Revision E+1 (December 5, 2000) ......................................... 43

Revision E+2 (March 23, 2001) .............................................. 43

Am29F017D

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