CD4029BMS
December 1992
CMOS Presettable Up/Down Counter
Description
CD4029BMS consists of a four-stage binary or BCD-decade up/
down counter with provisions for look-ahead carry in both count-
ing modes. The inputs consist of a single CLOCK, CARRY-IN
(CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET
ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a
CARRY OUT signal are provided as outputs.
A high PRESET ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state asynchronously with
the clock. A low on each JAM line, when the PRESET-ENABLE
signal is high, resets the counter to its zero count. The counter is
advanced one count at the positive transition of the clock when
the CARRY-IN and PRE-SET ENABLE signals are low.
Advancement is inhibited when the CARRY-IN or PRESET
ENABLE signals are high. The CARRY-OUT signal is normally
high and goes low when the counter reaches its maximum count
in the UP mode or the minimum count in the DOWN mode pro-
vided the CARRY-IN signal is low. The CARRY-IN signal in the
low state can thus be considered a CLOCK ENABLE. The
CARRY-IN terminal must be connected to VSS when not in use.
Binary counting is accomplished when the BINARY/DECADE
input is high; the counter counts in the decade mode when the
BINARY/DECADE input is low. The counter counts up when the
UP/DOWN input is high, and down when the UP/DOWN input is
low. Multiple packages can be connected in either a parallel-
clocking or a ripple-clocking arrangement as shown in Figure 17.
Parallel clocking provides synchronous control and hence faster
response from all counting outputs. Ripple-clocking allows for
longer clock input rise and fall times.
The CD4029BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
H4X
Frit Seal DIP
H1F
Ceramic Flatpack H6W
Features
• High-Voltage Type (20V Rating)
• Medium Speed Operation: 8MHz (Typ.) at CL = 50pF
and VDD - VSS = 10V
• Multi-Package Parallel Clocking for Synchronous High
Speed Output Response or Ripple Clocking for Slow
Clock Input Rise and Fall Times
• “Preset Enable” and Individual “Jam” Inputs Provided
• Binary or Decade Up/Down Counting
• BCD Outputs in Decade Mode
• 100% Tested for Maximum Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
• Maximum Input Current of 1µA at 18V Over Full Pack-
age-Temperature Range; 100nA at 18V and +25
o
C
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Stan-
dards No. 13B, “Standard Specifications for Descrip-
tion of “B” Series CMOS Device’s
Applications
• Programmable Binary and Decade Counting/Fre-
quency Synthesizers-BCD Output
• Analog to Digital and Digital to Analog Conversion
• Up/Down Binary Counting
• Difference Counting
• Magnitude and Sign Generation
• Up/Down Decade Counting
Pinout
CD4029BMS
TOP VIEW
PRESET ENABLE 1
Q4 2
JAM 4 3
JAM 1 4
CARRY IN 5
Q1 6
CARRY OUT 7
VSS 8
16 VDD
15 CLOCK
14 Q3
13 JAM 3
12 JAM 2
11 Q2
10 UP/DOWN
9 BINARY/DECADE
Functional Diagram
PRESET
ENABLE
CARRY IN
1
(CLOCK
ENABLE) 5
BINARY/
DECADE
JAM INPUTS
1
2
3
4
VDD
16
6 Q1
11 Q2
Q3
BUFFERED
OUTPUTS
4 12 13 3
9
14
UP/DOWN 10
2
CLOCK
15
7
Q4
8
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CARRY
OUT
File Number
3304
7-798
Specifications CD4029BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
o
C
At Distance 1/16
±
1/32 Inch (1.59mm
±
0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
θ
ja
θ
jc
Ceramic DIP and FRIT Package . . . . . 80
o
C/W
20
o
C/W
Flatpack Package . . . . . . . . . . . . . . . . 70
o
C/W
20
o
C/W
Maximum Package Power Dissipation (PD) at +125
o
C
For TA = -55
o
C to +100
o
C (Package Type D, F, K) . . . . . . 500mW
For TA = +100
o
C to +125
o
C (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/
o
C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
SUBGROUPS
1
2
VDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20
3
1
2
VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20
3
1
2
VDD = 18V
Output Voltage
Output Voltage
Output Current (Sink)
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
N Threshold Voltage
P Threshold Voltage
Functional
VOL15
VOH15
IOL5
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
VNTH
VPTH
F
VDD = 15V, No Load
VDD = 15V, No Load (Note 3)
VDD = 5V, VOUT = 0.4V
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
VDD = 10V, VOUT = 9.5V
VDD = 15V, VOUT = 13.5V
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
VIL
VIH
VIL
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
VDD = 5V, VOH > 4.5V, VOL < 0.5V
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
3
1, 2, 3
1, 2, 3
1
1
1
1
1
1
1
1
1
7
7
8A
8B
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
-
-100
-1000
-100
-
-
-
-
MAX
10
1000
10
-
-
-
100
1000
100
50
-
-
-
-
-0.53
-1.8
-1.4
-3.5
-0.7
2.8
UNITS
µA
µA
µA
nA
nA
nA
nA
nA
nA
mV
V
mA
mA
mA
mA
mA
mA
mA
V
V
V
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
(NOTE 1)
VDD = 20V, VIN = VDD or GND
+25
o
C, +125
o
C, -55
o
C 14.95
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
-
3.5
-
11
0.53
1.4
3.5
-
-
-
-
-2.8
0.7
VOH > VOL <
VDD/2 VDD/2
1.5
-
4
-
V
V
V
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-799
Specifications CD4029BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
SUBGROUPS TEMPERATURE
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
LIMITS
MIN
-
-
-
-
-
-
-
-
-
-
-
-
2
1.48
MAX
500
675
560
756
470
635
640
864
340
459
200
270
-
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
PARAMETER
Propagation Delay
Clock To Q Output
Propagation Delay
Clock To Carry Out
Propagation Delay
Preset Enable To Q
Propagation Delay
Preset Enable To Carry-
Out
Propagation Delay
Carry-In To
Carry-Out
Transition Time
Q Output
Maximum Clock Input
Frequency
NOTES:
SYMBOL
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPHL4
TPLH4
TPHL5
TPLH5
TTHL
TTLH
FCL
CONDITIONS
(NOTE 1, 2)
VDD = 5V, VIN = VDD or GND
1. VDD = 5V, CL = 50pF, RL = 200K
2. -55
o
C and +125
o
C limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
VDD = 5V, VIN = VDD or GND
NOTES
1, 2
TEMPERATURE
-55
o
C, +25
o
C
+125
o
C
VDD = 10V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
+125
o
C
VDD = 15V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
+125
o
C
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Output Current (Sink)
VOL
VOL
VOH
VOH
IOL5
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, VOUT = 0.4V
1, 2
1, 2
1, 2
1, 2
1, 2
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+125
o
C
-55
o
C
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1, 2
+125
o
C
-55
o
C
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1, 2
+125
o
C
-55
o
C
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
+125
o
C
-55
o
C
MIN
-
-
-
-
-
-
-
-
4.95
9.95
0.36
0.64
0.9
1.6
2.4
4.2
-
-
MAX
5
150
10
300
10
600
50
50
-
-
-
-
-
-
-
-
-0.36
-0.64
UNITS
µA
µA
µA
µA
µA
µA
mV
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
7-800
Specifications CD4029BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
(Continued)
LIMITS
PARAMETER
Output Current (Source)
SYMBOL
IOH5B
CONDITIONS
VDD = 5V, VOUT = 2.5V
NOTES
1, 2
TEMPERATURE
+125
o
C
-55
o
C
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
+125
o
C
-55
o
C
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125
o
C
-55
o
C
Input Voltage Low
Input Voltage High
Propagation Delay
Q Output
Propagation Delay
Carry Output
Propagation Delay
Preset Enable To Q
Propagation Delay
Preset Enable To Carry-
Out
Propagation Delay
Carry In To Carry Out
Transition Time
VIL
VIH
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPHL4
TPLH4
TPHL5
TPLH5
TTHL
TTLH
FCL
VDD = 10V, VOH > 9V, VOL < 1V
VDD = 10V, VOH > 9V, VOL < 1V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
TS
VDD = 5V
VDD = 10V
VDD = 15V
Clock Rise And Fall Time
Note 5
TRCL
TFCL
VDD = 5V
VDD = 10V
VDD = 15V
Minimum Clock Pulse
Width
TW
VDD = 5V
VDD = 10V
VDD = 15V
Minimum Carry In Setup
Time
Note 6
Minimum Carry Input
Hold Time
Note 6
Minimum Preset Enable
Removal Time
Note 4
TS
VDD = 5V
VDD = 10V
VDD = 15V
TH
VDD = 5V
VDD = 10V
VDD = 15V
TREM
VDD = 5V
VDD = 10V
VDD = 15V
1, 2
1, 2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25 C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
o
MIN
-
-
-
-
-
-
-
7
-
-
-
-
-
-
-
-
-
-
-
-
4
5.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX
-1.15
-2.0
-0.9
-2.6
-2.4
-4.2
3
-
240
180
260
190
200
160
290
210
140
100
100
80
-
-
340
140
100
15
15
15
180
90
60
200
70
60
50
30
25
200
110
80
UNITS
mA
mA
mA
mA
mA
mA
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Maximum Clock Input
Frequency
Minimum Data Setup
Time
Note 4
7-801
Specifications CD4029BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
(Continued)
LIMITS
PARAMETER
Minimum Preset Enable
Pulse Width
SYMBOL
TW
CONDITIONS
VDD = 5V
VDD = 10V
VDD = 15V
Input Capacitance
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. From Up/Down, Binary/Decode, Carry In, or Preset Enable Control Inputs to Clock Edge.
5. If more than one unit is cascaded in the parallel clocked application, tr CL should be made
≤
the sum of the fixed propagation delay at
15pF and the transition time of the carry output driving stage for the estimated capacitive load. This measurement was made with a de-
coupling capacitor (>1µF) between VDD and VSS.
6. From Carry In to Clock Edge.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
N Threshold Voltage
N Threshold Voltage
Delta
P Threshold Voltage
P Threshold Voltage
Delta
Functional
SYMBOL
IDD
VNTH
∆VTN
VTP
∆VTP
F
CONDITIONS
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
1, 2, 3, 4
+25
o
C
NOTES
1, 4
1, 4
1, 4
1, 4
1, 4
1
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
-2.8
-
0.2
-
VOH >
VDD/2
-
MAX
25
-0.2
±1
2.8
±1
VOL <
VDD/2
1.35 x
+25
o
C
Limit
UNITS
µA
V
V
V
V
V
CIN
Any Input
NOTES
1, 2, 3
1, 2, 3
1, 2, 3
1, 2
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
-
-
-
MAX
130
70
50
7.5
UNITS
ns
ns
ns
pF
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns
3. See Table 2 for +25
o
C limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25
O
C
PARAMETER
Supply Current - MSI-2
Output Current (Sink)
Output Current (Source)
SYMBOL
IDD
IOL5
IOH5A
±
1.0µA
±
20% x Pre-Test Reading
±
20% x Pre-Test Reading
DELTA LIMIT
7-802
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