Multi-Port SRAM, 2KX8, 35ns, CMOS, CQCC52, CERAMIC, LCC-52
| Parameter Name | Attribute value |
| Parts packaging code | LCC |
| package instruction | QCCN, |
| Contacts | 52 |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Maximum access time | 35 ns |
| Other features | AUTOMATIC POWER-DOWN; INTERRUPT FLAG |
| JESD-30 code | S-CQCC-N52 |
| JESD-609 code | e0 |
| length | 19.0627 mm |
| memory density | 16384 bit |
| Memory IC Type | MULTI-PORT SRAM |
| memory width | 8 |
| Number of functions | 1 |
| Number of ports | 2 |
| Number of terminals | 52 |
| word count | 2048 words |
| character code | 2000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 2KX8 |
| Output characteristics | 3-STATE |
| Exportable | YES |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | QCCN |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| Certification status | Not Qualified |
| Filter level | MIL-STD-883 |
| Maximum seat height | 2.54 mm |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | TIN LEAD |
| Terminal form | NO LEAD |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| width | 19.0627 mm |
| Base Number Matches | 1 |
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