5T940-10NLGI datasheet, PDF - EEWORLD Datasheet

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5T940-10NLGI: DescriptionVFQFPN-28, Tray; Categorylogic logic; File Size114KB，13 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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5T940-10NLGI Overview

VFQFPN-28, Tray

5T940-10NLGI Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	VFQFPN
package instruction	GREEN, PLASTIC, VFQFPN-28
Contacts	28
Manufacturer packaging code	NLG28
Reach Compliance Code	unknown
ECCN code	EAR99
series	5T
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQCC-N28
JESD-609 code	e3
length	6 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	28
Actual output times	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC28,.24SQ,25
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	2.5/3.3 V
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.02 ns
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6 mm
minfmax	666.52 MHz
Base Number Matches	1

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IDT5T940

PRECISION CLOCK GENERATOR OC-192 APPLICATIONS

INDUSTRIAL TEMPERATURE RANGE

PRECISION CLOCK GENERATOR

OC-192 APPLICATIONS

PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES OCTOBER 28, 2014

IDT5T940

FEATURES:

• Input frequency:

- For SONET non-FEC: 19.44MHz, 38.88MHz, 77.76MHz, 155.52MHz,

311.04MHz, or 622.08MHz

- For SONET FEC: 20.83MHz, 41.66MHz, 83.31MHz, 166.63MHz,

333.26MHz, or 666.52MHz

- For 10GE copper: 19.53MHz, 39.06MHz, 78.125MHz, 156.25MHz,

312.5MHz, or 625MHz

- For 10GE optical: 20.14MHz, 40.28MHz, 80.56MHz, 161.13MHz,

322.26MHz, or 644.53MHz

• 3-level inputs for feedback divide ratio and output frequency range

selection

• 1x, 2x, 4x, 8x, 16x, and 32x outputs on Q

OUT

• Regenerated input clock or Q

OUT

/4 on Q

REG

• Lock indicator

• Power-down mode

• LVPECL or LVDS outputs

• Three modes of output frequency range

- Mode 0: Q

OUT

range 155.5 - 166.6MHz. Q

REG

is a regenerated version

of the input clock.

- Mode 1: Q

OUT

range 622 - 666.5MHz. Q

REG

output 155.5-166.6MHz.

- Mode 2: Q

OUT

range 622 - 666.5MHz. Q

REG

is a regenerated version

of the input clock frequency.

• Selectable loop bandwidths

• Hitless switchover

• Differential LVPECL, LVDS, or single-ended LVTTL input interface

• 2.375 - 3.465V core and I/O

• Available in VFQFPN package

• use replacement part:8T49N222B-dddNLGI

The IDT5T940 generates a high precision FEC (Forward Error Cor-

rection) or non-FEC source clock for SONET/SDH systems as well as a

source clock for Gigabit Ethernet systems. This device also has clock

regeneration capability: it creates a "clean" version of the clock input by

using the internal oscillator to square the input clock's rising and falling

edges and remove jitter. In the event that the main clock input fails, the

device automatically locks to a backup reference clock using a hitless

switchover mechanism.

This device detects loss of valid CLKIN and leaves the VCO of the PLL at

the last valid frequency while an alternate input REFIN is selected. If CLKIN

and REFIN are different frequencies, the multiplication factor will be adjusted to

retain the same output frequency.

The IDT5T940 can act as a translator from a differential LVPECL, LVDS, or

single-ended LVTTL input to LVPECL or LVDS outputs. The IDT5T940-10

has LVDS outputs and the IDT5T940-30 has LVPECL outputs.

The three modes of output frequency range are controlled by the SELmode,

which is a 3-level pin. When SELmode is high or low, the Q

OUT

is a multiplied

version of the input clock while Q

REG

is a regenerated version of the input clock.

When SELmode is mid, the Q

OUT

is a multiplied version of the input clock while

REG

is Q

OUT

/4.

The IDT5T940 features a selectable loop bandwidth.

DESCRIPTION:

APPLICATIONS:

•

Terabit routers

Gigabit ethernet systems

SONET / SDH systems

Digital cross connects

Optical transceiver modules

FUNCTIONAL BLOCK DIAGRAM

PLLBW

REG

PLL

DIV

REG

CLKIN

INPUT

MUX

OUT

DIV

OUT

REFIN

LOCK,

FREQ.

DETECTOR

CONTROL

LOGIC

SEL

MODE

LOCK

CLK/

REF

CLK/

REF

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

2013

Integrated Device Technology, Inc.

MAY 2013

DSC 6195/27

5T940-10NLGI Related Products

	5T940-10NLGI	5T940-30NLGI
Description	VFQFPN-28, Tray	VFQFPN-28, Tray
Brand Name	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Parts packaging code	VFQFPN	VFQFPN
package instruction	GREEN, PLASTIC, VFQFPN-28	GREEN, PLASTIC, VFQFPN-28
Contacts	28	28
Manufacturer packaging code	NLG28	NLG28
Reach Compliance Code	unknown	compliant
ECCN code	EAR99	EAR99
series	5T	5T
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-PQCC-N28	S-PQCC-N28
JESD-609 code	e3	e3
length	6 mm	6 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Humidity sensitivity level	1	3
Number of functions	1	1
Number of terminals	28	28
Actual output times	2	2
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.02 ns	0.02 ns
Maximum seat height	1 mm	1 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	2.375 V	2.375 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed	MATTE TIN
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.65 mm	0.65 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	6 mm	6 mm
minfmax	666.52 MHz	666.52 MHz
Base Number Matches	1	1

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