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CN3120-300BG868-CP

Description
Microprocessor,
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size191KB,2 Pages
ManufacturerMarvell
Websitehttp://www.marvell.com
Download Datasheet Parametric View All

CN3120-300BG868-CP Overview

Microprocessor,

CN3120-300BG868-CP Parametric

Parameter NameAttribute value
MakerMarvell
package instruction,
Reach Compliance Codecompliant
Base Number Matches1
Multi-Core MIPS64 Processors
R
OCTEON CN31XX Single and Dual Core MIPS64 Based SoCs
Product Brief
OVERVIEW
The OCTEON
®
CN31XX family of Single and Dual Core MIPS64 processors targets intelligent networking, control plane, storage,
and wireless applications in next-generation equipment from hundreds of Mbps to 2 Gbps performance. This cost-e ective
family consists of 8 di erent software-compatible parts, with one or two cnMIPS64 cores on a single chip that integrate
next-generation I/Os, including gigabit Ethernet and USB 2.0, along with the most advanced security and application hardware
acceleration to deliver a 3x+ performance, power and real-estate value proposition over alternatives.
®
FEATURES
Custom CPU cores optimized for networking
1-2 cnMIPS™ CPU cores (MIPS64/32 compatible) with
MMU
Available in 300 MHz to 500 MHz versions
Enhanced MIPS64 integer (Release 2) instruction set
Dual-issue, ve-stage pipeline, optimized latencies
Auto instruction pre-fetching and advanced data pre-fetching
features to minimize memory stalls
BENEFITS
Market-leading performance
Up to 2 Billion instructions per second
500 Mbps to 2 Gbps application performance
-
Up to 2 Gbps 64B IP forwarding
-
Up to 2 Gbps for TCP, IPsec, SSL, compression/
decompression
-
Up to 1 Gbps for Regular Expression
Queuing, scheduling
Very low latency for real-time tra c
High-performance coherent memory subsystem
Support for voice, video and data with integrated hardware
256KB ECC protected 4-way set associative L2 cache with
locking, partitioning features for optimal performance
Integrated mainstream 64/72-bit DDR2 memory controller
with ECC, up to DDR2-667
Optional, additional low-latency 16-bit DDR2-667 for content
based processing and meta-data
Reduced BOM cost with essential interfaces for next
generation networking equipment
Glueless support for switching, WLAN, voice and video
High-speed USB 2.0 enables printer, storage connectivity
Integrated coprocessors for application acceleration
Packet I/O processing, QoS, TCP, Acceleration
Support for IPsec, SSL, SRTP, WLAN security (includes
DES, 3DES, AES (up to 256-bit), SH-A1, SHA-2 up to
SHA-512, RSA, DH)
Regular expression, compression/de-compression
Flexible architecture allows host and coprocessor
Implementations
Industry-standard programming model without any need
for proprietary tools or micro-coding
Fully software compatible with OCTEON CN38XX, CN36XX,
CN30XX to deliver 1-16 CPU scalability
Integrated high-performance networking interfaces
Up to 3 Con gurable Ethernet I/Os - 3x 10/100/1000 Ethernet
MACs (RGMII) or 1x RGMII + 1x GMII
Integrated 32-bit, 100 MHz PCI/PCI-X host or slave
TDM/PCM interface for glueless VoIP support
USB 2.0, high-speed (480 Mbps), host with integrated PHY
OCTEON
®
CN31XX - Block Diagram
16-bit DDR2
Optional
RNG
RNG
Boot/flash
GPIO
2xUART
8x RegEx
8x RegEx
Engines
Engines
Hyper Access Low Latency
Hyper Access Low Latency
Memory Controller
Memory Controller
Misc I/O
Misc I/O
PCI-X
PCI-X
TCP Unit
TCP Unit
Sched/
Sched/
Synch/
Synch/
Order
Order
Packet
Security
MIPS64 r2
Integer
32K Icache
8K Dcache
2K Write Buffer
1-2
cnMIPS
cores
Packet
Security
MIPS64 r2
Integer
32K Icache
8K Dcache
2K Write Buffer
PCI 32-bit
100 MHz
TDM/PCM
USB 2.0
Host w/PHY
TDM/PCM
TDM/PCM
USB
USB
Compress
Compress
/
/
Decomp
Decomp
I/O Bus
Packet
Packet
Input
Input
I/O
I/O
Bridge
Bridge
Coherent Bus
Hyper
Hyper
Access
Access
Memory
Memory
Controller
Controller
72-bit wide – DDR II
up to DDR2 - 667 MHz
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
3x RGMII
or
1x RGMII +
1x GMII
Packet
Packet
Interface
Interface
Packet
Packet
Output
Output
256KB Shared
256KB Shared
L2 Cache
L2 Cache
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