SN54L73T-12 datasheet, PDF - EEWORLD Datasheet

SN54L73T-12: DescriptionTTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14, CERAMIC, DFP-14; Categorylogic logic; File Size2MB，60 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN54L73T-12 Overview

TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14, CERAMIC, DFP-14

Parameter Name	Attribute value
Maker	Texas Instruments
Parts packaging code	DFP
package instruction	CERAMIC, DFP-14
Contacts	14
Reach Compliance Code	unknown
Other features	MASTER SLAVE OPERATION
series	TTL/H/L
JESD-30 code	R-GDFP-F14
length	6.48 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Package shape	RECTANGULAR
Package form	FLATPACK
Maximum supply current (ICC)	1.44 mA
propagation delay (tpd)	150 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
Trigger type	NEGATIVE EDGE
width	3.683 mm
minfmax	2.5 MHz
Base Number Matches	1

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