EEPROM
Austin Semiconductor, Inc.
128K x 8 EEPROM
EEPROM Memory
AVAILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-38267
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MIL-STD-883
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AS58C1001
PIN ASSIGNMENT
(Top View)
32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ)
RDY/BUSY\
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
RES\
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
FEATURES
High speed: 150, 200, and 250ns
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Data Retention: 10 Years
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Low power dissipation, active current (20mW/MHz (TYP)),
standby current (100µW(MAX))
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Single +5V (+10%) power supply
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Data Polling and Ready/Busy Signals
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Erase/Write Endurance (10,000 cycles in a page mode)
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Software Data protection Algorithm
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Data Protection Circuitry during power on/off
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Hardware Data Protection with RES pin
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Automatic Programming:
Automatic Page Write: 10ms (MAX)
128 Byte page size
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GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS
Electrically Erasable Programmable Read Only Memory (EEPROM)
organized as 131, 072 x 8 bits. The AS58C1001 is capable or in
system electrical Byte and Page reprogrammability.
The AS58C1001 achieves high speed access, low power consump-
tion, and a high level of reliability by employing advanced MNOS
memory technology and CMOS process and circuitry technology and
CMOS process and circuitry technology.
This device has a 128-Byte Page Programming function to make its
erase and write operations faster. The AS58C1001 features Data
Polling and a Ready/Busy signal to indicate completion of erase and
programming operations.
This EEPROM provides several levels of data protection. Hard-
ware data protection is provided with the RES pin, in addition to noise
protection on the WE signal and write inhibit during power on and off.
Software data protection is implemented using JEDEC Optional Stan-
dard algorithm.
The AS58C1001 is designed for high reliability in the most de-
manding applications. Data retention is specified for 10 years and
erase/write endurance is guaranteed to a minimum of 10,000 cycles in
the Page Mode.
OPTIONS
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MARKINGS
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Timing
150ns access
-15
200ns access
-20
250ns access
-25
Packages
Ceramic Flat Pack
F
Radiation Shielded Ceramic FP* SF
Ceramic SOJ
DCJ
Operating Temperature Ranges
-Military (-55
o
C to +125
o
C)
-Industrial (-40
o
C to +85
o
C)
No. 306
No. 305
No. 508
XT
IT
*NOTE: Package lid is connected to ground (Vss).
PIN NAME
A0 to A16
I/O0 to I/O7
OE\
CE\
WE\
Vcc
Vss
RDY/Busy\
RES\
AS58C1001
Rev. 4.0 3/01
FUNCTION
Address input
Data input/output
Output enable
Chip enable
Write enable
Power supply
Ground
Ready busy
Reset
For more products and information
please visit our web site at
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
EEPROM
Austin Semiconductor, Inc.
AS58C1001
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
High Voltage Generator
I/O0
I/O7
Ready/Busy
OE\
I/O Buffer
and
Input Latch
Control Logic and Timing
CE\
WE\
RES\
A0
A6
Y Decoder
Y Gating
Address
Buffer and
Latch
X Decoder
A7
A16
Memory Array
Data Latch
MODE SELECTION
MODE
READ
STANDBY
WRITE
DESELECT
WRITE
INHIBIT
DATA
POLLING
PROGRAM
Notes:
1. RDY/Busy\ output has only active LOW V
OL
and HIGH impedance state. It can not go to HIGH (V
OH
) state.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
CE\
V
IL
V
IH
V
IL
V
IL
X
X
V
IL
X
OE\
V
IL
X
V
IH
V
IH
X
V
IL
V
IL
X
WE\
V
IH
X
V
IL
V
IH
V
IH
X
V
IH
X
RES\
V
H
X
V
H
V
H
X
X
V
H
V
IL
RDY/BUSY\
High-Z
High-Z
1
I/O
D
OUT
High-Z
D
IN
High-Z
---
---
Data Out
(I/O7)
High-Z
High-Z to V
OL
High-Z
---
---
V
OL
High-Z
2
EEPROM
Austin Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
AUTOMATIC PAGE WRITE
The Page Write feature allows 1 to 128 Bytes of data to
be written into the EEPROM in a single cycle and allows the
undefined data within 128 Bytes to be written corresponding
to the undefined address (A
0
to A
6
). Loading the first Byte of
data, the data load window of 30µs opens for the second. In
the same manner each additional Byte of data can be loaded
within 30µs. In case CE\ and WE\ are kept high for 100µs
after data input, the EEPROM enters erase and write
automatically and only the input data can be written into the
EEPROM. In Page mode the data can be written and accessed
10
4
times per page, and in Byte mode 10
3
times per Byte.
AS58C1001
PROGRAMMING/ERASE
The 58C1001 does
NOT
employ a BULK-erase function.
The memory cells can be programmed ‘0’ or ‘1’. A write cycle
performs the function of erase & write on every cycle with
the erase being transparent to the user. The internal erase data
state is considered to be ‘1’. To program the memory array
with background of ALL 0’s or All 1’s, the user would
program this data using the page mode write operation to
program all 1024 128-byte pages.
DATA PROTECTION
To protect the data during operation and power on/off,
the AS58C1001 has:
1. Data protection against Noise on Control Pins (CE\,
OE\, WE\) during Operation. During readout or standby, noise
on the control pins may act as a trigger and turn the EEPROM
to programming mode by mistake. To prevent this phenom-
enon, the AS58C1001 has a noise cancellation function that
cuts noise if its width is 20ns or less in programming mode.
Be careful not to allow noise of a width of more than 20ns on
the control pins.
DATA\ POLLING
Data\ Polling allows the status of the EEPROM to be
determined. If the EEPROM is set to Read mode during a
Write cycle, and inversion of the last Byte of data to be loaded
outputs from I/O, to indicate that the EEPROM is performing
a Write operation.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act
as a trigger with a WE\ pulse of less than 20ns.
(2) Write inhibit: Holding OE\ low, WE\ high or CE\
high, inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling
edge of WE\ or CE\, and data is latched by the rising edge of
WE\ or CE\.
WRITE/ERASE ENDURANCE AND
DATA RETENTION
The endurance with page programming is 10
4
cycles (1%
cumulative failure rate) and the data retention time is more
than 10 years when a device is programmed less than 10
4
cycles.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to
be determined. The RDY/Busy\ signal has high impedance
except in write cycle and is lowered to V
OL
after the first write
signal. At the end of the write cycle, the RDY/Busy\ signal
changes state to high impedance. This allows many 58C1001
devices RDY/Busy\ signal lines to be wired-OR together.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
EEPROM
Austin Semiconductor, Inc.
(EXAMPLE)
AS58C1001
Vcc
RES\
*unprogrammable
*unprogrammable
FUNCTIONAL DESCRIPTION (continued)
Write Address
DATA PROTECTION (continued)
2. Data protection at Vcc on/off.
When RES\ is low, the EEPROM cannot be erased and
programmed. Therefore, data can be protected by keeping
RES\ low when Vcc is switched. RES\ should be high during
programming because it does not provide a latch function.
When Vcc is turned on or off, noise on the control pins
generated by external circuits (CPU, etc.) may turn the
EEPROM to programming mode by mistake. To prevent this
unintentional programming, the EEPROM must be kept in an
unprogrammable, standby or readout state by using a CPU
reset signal to RES\ pin.
In addition, when RES\ is kept high at Vcc on/off timing,
the input level of control pins (CE\, OE\, WE\) must be held
as CE\=Vcc or OE\=LOW or WE\=Vcc level.
3. Software Data Protection
To protect against unintentional programming caused by
noise generated by external circuits, AS58C1001 has a
Software data protection function. To initate Software data
protection mode, 3 bytes of data must be input, followed by a
dummy write cycle of any address and any data byte. This
exact sequence switches the device into protection mode. This
4th cycle during write is required to initiate the SDP and
physically writes the address and data. While in SDP the
entire array is protected in which writes can only occur if the
exact SDP sequence is re-executed or the unprotect sequence
is executed.
Write Data
(Normal Data Input)
AA
55
A0
5555
2AAA
5555
The Software data protection mode can be cancelled by
inputting the following 6 Bytes. This changes the AS58C1001
to the Non-Protection mode, for normal operation.
Address
5555
2AAA
5555
5555
2AAA
5555
4
Data
AA
55
80
AA
55
20
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
EEPROM
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Supply Relative to Vss................-0.5V to +7.0V
1
Voltage on any pin Relative to Vss.......................-0.6V to +7.0V
1
Storage Temperature ............................................-65°C to +150°C
Operating Temperature Range.............................-55
o
C to +125
o
C
Soldering Temperature Range...............................................260
o
C
Maximum Junction Temperature**....................................+150°C
Power Dissipation...................................................................1.0W
AS58C1001
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
** Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C; Vcc = 5V +10%)
PARAMETER
Input High (Logic 1) Voltage
3
Input Low (Logic 0) Voltage
Input Voltage (RES\ Pin)
4
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
CONDITION
SYMBOL
V
IH
V
IL
V
H
I
LI
I
LO
V
OH
V
OL
MIN
2.2
-0.3
Vcc-0.5
-2
-2
2.4
MAX
V
CC
+ 0.3V
0.8
V
CC
+1.0
2
2
0.4
UNITS
V
V
V
µΑ
µΑ
V
V
NOTES
9
2
4
OV < V
IN
< Vcc
Output(s) disabled, OV < V
OUT
< Vcc
I
OH
= -400
µA
I
OL
= 2.1 mA
PARAMETER
CONDITIONS
I
OUT
=OmA, Vcc = 5.5V
Cycle=1µS, Duty=100%
SYM
-15
20
MAX
-20
20
-25
20
UNITS NOTES
Power Supply Current:
Operating
I
CC3
I
OUT
=OmA, Vcc = 5.5V
Cycle=MIN, Duty=100%
65
55
50
mA
CE\=Vcc, Vcc = 5.5V
Power Supply Current:
Standby
CE\=V
IH
, Vcc = 5.5V
I
CC1
350
350
350
µA
I
CC2
3
3
3
mA
CAPACITANCE
PARAMETER
Input Capacitance
Output Capactiance
CONDITIONS
T
A
= 25 C, f = 1MHz
V
IN
= 0
o
SYMBOL
C
IN
Co
MAX
6
12
UNITS
pF
pF
NOTES
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
Analogue and Mixed Signal
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