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EG-2101CA87.5000M-DCYL3

Description
CLOCK SAW OSCILLATOR, 87.5 MHz, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size253KB,2 Pages
ManufacturerSeiko Epson Corporation
Environmental Compliance
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EG-2101CA87.5000M-DCYL3 Overview

CLOCK SAW OSCILLATOR, 87.5 MHz, ROHS COMPLIANT, CERAMIC, SMD, 6 PIN

EG-2101CA87.5000M-DCYL3 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionDILCC6,.2
Reach Compliance Codecompliant
Other featuresOUTPUT ENABLE FUNCTION; DIFFERENTIAL OUTPUT; TAPE AND REEL
maximum descent time0.6 ns
frequency tolerance100 ppm
JESD-609 codee4
Installation featuresSURFACE MOUNT
Number of terminals6
Maximum operating frequency99.999 MHz
Minimum operating frequency62.5 MHz
Nominal operating frequency87.5 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeSAW OSCILLATOR
Output compatibilityLVPECL
Package body materialCERAMIC
Encapsulate equivalent codeDILCC6,.2
physical size7.0mm x 5.0mm x 1.2mm
power supply3.3 V
Certification statusNot Qualified
longest rise time0.6 ns
Maximum slew rate60 mA
Maximum supply voltage3.45 V
Minimum supply voltage3.15 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry52.5/47.5 %
Terminal surfaceGold (Au)
Base Number Matches1
Crystal oscillator
Product Number (please contact us)
Q3803CA00xxxx00
CRYSTAL OSCILLATOR
LOW-JITTER SAW OSCILLATOR
EG - 2101CA
Frequency
range
Supply
voltage
Output
Function
External
dimensions
:
:
:
:
:
62.5 MHz to 99.999 MHz
3.3 V
Differential LV-PECL
Output enable (OE)
7.0 × 5.0 × 1.2 mm
Actual size
Very
low jitter and low phase noise by SAW unit.
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature
Frequency tolerance *1
Current consumption
Disable current
Symmetry
Output voltage
Output load condition (ECL)
Input voltage
Rise time / Fall time
Start-up time
Symbol
fo
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
L_ECL
V
IH
V
IL
t
r
/
t
f
t_str
Jitter *2
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
t
PJ
Phase Jitter
Frequency aging
f_aging
*1 As per below table
*2 Based on DTS-2075 Digital timing system made from WAVECREST with jitter analysis software VISI6.
Symmetry
D: 50
2.5
%
DCH
H:
100 
10
-6
(0
C
to +70
C)
*3
frequency tolerance and
Y:
100 
10
-6
(0
C
to +70
C)
*4
DCY
operating temperature
Z:
50 
10
-6
(0
C
to +70
C)
*5
DCZ
*3 This includes initial frequency tolerance, temperature variation, supply voltage variation, reflow drift, and aging(+25
C,10
years).
*4 This includes initial frequency tolerance, temperature variation, supply voltage variation, and reflow drift(except aging).
*5 This includes initial frequency tolerance and temperature variation(except supply voltage variation, reflow drift, aging).
Specifications
62.500 MHz to 99.999 MHz
3.3 V
0.15
V
-40
C
to +100
C
0
C
to +70
C
Z:
50 
10
-6
, H,Y: ±100
10
-6
60 mA Max.
25 mA Max.
D:47.5 % to 52.5 %
2.35 V Typ. V
CC
-1.025 V to V
CC
-0.88 V
1.60 V Typ. V
CC
-1.81 V to V
CC
-1.62 V
50
70 % V
CC
Min.
30 % V
CC
Max.
600 ps Max.
10 ms Max.
0.2 ps Typ.
3 ps Typ.
3 ps Typ.
25 ps Typ.
4 ps Typ.
0.8 ps Max.
0.5 ps Max.
0.3 ps Max.
5
10
-6
/ year Max.
Conditions / Remarks
Please contact us for inquiries regarding available frequencies
Store as bare product.
OE=Vcc, L_ECL=50
OE=GND
at outputs crossing point
DC characteristics
Terminated to V
CC
-2.0 V
OE terminal
Between 20% and 80% of (V
OH
-V
OL
)
Time at minimum supply voltage to be 0 s
Deterministic Jitter
Random Jitter
(RMS of total distribution)
Peak to Peak
Accumulated Jitter() n=2 to 50000 cycles
fo
100 MHz
Offset frequency: 12 kHz
100 MHz
fo
200 MHz
to 20 MHz
200 MHz
fo
+25
C,
First year, V
CC
=3.3 V
External dimensions
(Unit:mm)
Footprint (Recommended)
(Unit:mm)
#6
#5
#4
5.0±0.2
#4
#5
1.1
1.4 #6
1.6
#1
#2
#3
1.2±0.2
#3
7.0±0.2
2.54
#2
#1
Pin map
Pin
Connection
1
OE
2
N.C.
3
GND
4
OUT
5
OUT
6
Vcc
#3 is connected to the
cover.
2.54
5.08
5.08
5.08
OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance
To maintain stable operation, provide a 0.01uF to
0.1uF by-pass capacitor at a location as near as
possible to the power source terminal of the
crystal product (between Vcc - GND).
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