IDT7201LA50PDGB datasheet, PDF

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IDT7201LA50PDGB: DescriptionFIFO, 512X9, 50ns, Asynchronous, CMOS, PDIP28, 0.600 INCH, GREEN, PLASTIC, DIP-28; Categorystorage storage; File Size119KB，14 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT7201LA50PDGB Overview

FIFO, 512X9, 50ns, Asynchronous, CMOS, PDIP28, 0.600 INCH, GREEN, PLASTIC, DIP-28

IDT7201LA50PDGB Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	DIP
package instruction	DIP, DIP28,.6
Contacts	28
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	50 ns
Other features	RETRANSMIT
Maximum clock frequency (fCLK)	15 MHz
period time	65 ns
JESD-30 code	R-PDIP-T28
JESD-609 code	e3
length	36.576 mm
memory density	4608 bit
Memory IC Type	OTHER FIFO
memory width	9
Humidity sensitivity level	1
Number of functions	1
Number of terminals	28
word count	512 words
character code	512
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512X9
Exportable	NO
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum seat height	4.699 mm
Maximum standby current	0.015 A
Maximum slew rate	0.1 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	15.24 mm
Base Number Matches	1

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CMOS ASYNCHRONOUS FIFO

256 x 9, 512 x 9 and 1,024 x 9

FEATURES:

•

IDT7200L

IDT7201LA

IDT7202LA

•

First-In/First-Out dual-port memory

256 x 9 organization (IDT7200)

512 x 9 organization (IDT7201)

1,024 x 9 organization (IDT7202)

Low power consumption

— Active: 440mW (max.)

—Power-down: 28mW (max.)

Ultra high speed—12ns access time

Asynchronous and simultaneous read and write

Fully expandable by both word depth and/or bit width

Pin and functionally compatible with 720X family

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CEMOS™ technology

Military product compliant to MIL-STD-883, Class B

Standard Military Drawing #5962-87531, 5962-89666, 5962-89863

and 5962-89536 are listed on this function

Dual versions available in the TSSOP package. For more informa-

tion, see IDT7280/7281/7282 data sheet

IDT7280 = 2 x IDT7200

IDT7281 = 2 x IDT7201

IDT7282 = 2 x IDT7202

Industrial temperature range (–40

C to +85

C) is available

(plastic packages only)

Green parts available, see ordering information

DESCRIPTION:

The IDT7200/7201/7202 are dual-port memories that load and empty data

on a first-in/first-out basis. The devices use Full and Empty flags to prevent data

overflow and underflow and expansion logic to allow for unlimited expansion

capability in both word size and depth.

The reads and writes are internally sequential through the use of ring

pointers, with no address information required to load and unload data. Data

is toggled in and out of the devices through the use of the Write (W) and Read

(R) pins.

The devices utilize a 9-bit wide data array to allow for control and parity bits

at the user’s option. This feature is especially useful in data communications

applications where it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability that allows for reset

of the read pointer to its initial position when

is pulsed LOW to allow for

retransmission from the beginning of data. A Half-Full Flag is available in the

single device mode and width expansion modes.

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

They are designed for those applications requiring asynchronous and

simultaneous read/writes in multiprocessing and rate buffer applications.

Military grade product is manufactured in compliance with the latest revision of

MIL-STD-883, Class B.

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

-D

)

WRITE

CONTROL

WRITE

POINTER

RAM

ARRAY

256 x 9

512 x 9

1,024 x 9

READ

POINTER

READ

CONTROL

THREE-

STATE

BUFFERS

DATA OUTPUTS

-Q

)

RESET

LOGIC

FL/RT

FLAG

LOGIC

EXPANSION

LOGIC

XO/HF

2679 drw 01

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.

COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES

OCTOBER 2008

DSC-2679/12

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