PSD503B1-70LI datasheet, PDF - EEWORLD Datasheet

PSD503B1-70LI: DescriptionMULTIFUNCTION PERIPHERAL, CQCC68, WINDOWED, CERAMIC, LDCC-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，130 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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PSD503B1-70LI Overview

MULTIFUNCTION PERIPHERAL, CQCC68, WINDOWED, CERAMIC, LDCC-68

Parameter Name	Attribute value
Maker	STMicroelectronics
Parts packaging code	QFN
package instruction	WINDOWED, CERAMIC, LDCC-68
Contacts	68
Reach Compliance Code	unknown
Other features	16K X 16 REPROGRAMMABLE EPROM; GENERAL PURPOSE ZPLD, DECODING ZPLD & PERIPHERAL ZPLD
Address bus width	16
boundary scan	NO
Bus compatibility	8031; 80196; 80196SP; 80186; 68HC11; 68HC16; 68330; 68331; 68340; 68302; 16000; Z80; Z8
maximum clock frequency	36 MHz
External data bus width	16
JESD-30 code	S-CQCC-J68
length	24.105 mm
Number of I/O lines	40
Number of terminals	68
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	WQCCJ
Package shape	SQUARE
Package form	CHIP CARRIER, WINDOW
Certification status	Not Qualified
RAM (number of words)	512
Maximum seat height	4.57 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	24.105 mm
Base Number Matches	1

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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