CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. The MOSFET Output Drain is internally clamped with a Drain-to-Gate zener diode that turns on the MOSFET to hold the Drain at the
VCLAMP voltage. Refer to the Electrical Specifications Table for the VCLAMP voltage limits.
4. Each Output has Over Current Shutdown protection in the positive current direction. The maximum peak current rating is set equal to the
minimum Over Current Shutdown as detailed in the Electrical Specification Table. In the event of an Over Current Shutdown the input
drive is latched OFF. The output short must be removed and the input toggled OFF and ON to restore the output drive.
5. Refer to Application Note AN9416 for Single Pulse Energy and Device Dissipation rating information, including inductive load operation
and other thermal stress characterization.
6.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
7. Maximum PSOP Package Dissipation at 125
o
C with 26
o
C/W Heat Sink (6 sq cm Copper PCB) is 0.96W.
Electrical Specifications
V
CC
= 5V
±10%,
T
A
= -40
o
C to 125
o
C; Unless Otherwise Specified
HIP0082
HIP0084
MAX
MIN
TYP
MAX
UNITS
Ω
Ω
Ω
Ω
V
V
A
A
A
µs
pF
PARAMETER
POWER OUTPUTS
Output ON Resistance
(Normal Mode)
SYMBOL
TEST CONDITIONS
MIN
TYP
r
DS(ON)1
, Outputs 1 and 2, One Output ON,
r
DS(ON)2
I
OUT
= 2A, T
J
= 150
o
C
r
DS(ON)3,
Outputs 3 and 4, One Output ON,
r
DS(ON)4
I
OUT
= 2A, T
J
= 150
o
C
-
-
-
-
0.62
0.57
-
-
-
-
-
-
-
80
-
-
-
-
-
-
0.62
0.57
0.5
0.5
90
±1.5
5.1
3.4
8.3
3
250
Output ON Resistance
(Normal Mode)
Output ON Resistance
(Normal Mode)
Output Zener Clamp Voltage
Matching Zener Clamp
Voltage
Output Short Current Limit,
Outputs 1 and 2 (Note 8)
Output Short Current Limit,
Outputs 3 and 4 (Note 8)
Output Short Current Limit,
Outputs 3 and 4 (Note 8)
Short Circuit Current Filter
Time
Output Capacitance
r
DS(ON)1
, Outputs 1 and 2, One Output ON,
r
DS(ON)2
I
OUT
= 2A, T
J
= 75
o
C
r
DS(ON)3
, Outputs 3 and 4, One Output ON,
r
DS(ON)4
I
OUT
= 2A, T
J
= 105
o
C
V
Z
∆V
Z
I
SC(L)
I
SC(L)
I
SC(H)
t
SC
C
O
V
OUTX
= 16V, f = 1MHz
ISC Bit High
ISC Bit Low
I
OUT
= 40mA
I
OUT
= 40mA, t
Z
= 100µs
2
2
5
-
-
73
N/A
-
90
73
-
3.4
3.4
7.5
1
250
3
2
5
-
-
80
N/A
-
-
-
-
-
3
HIP0082, HIP0084
Electrical Specifications
V
CC
= 5V
±10%,
T
A
= -40
o
C to 125
o
C; Unless Otherwise Specified
(Continued)
HIP0082
PARAMETER
Positive Output Voltage
Ramp Slew Rate, Inductive
Load Switching Off
SYMBOL
SR1
TEST CONDITIONS
I
OUTX
= 1A, Load 6mH, 12Ω;
Measure 25% to 75% of V
Z
I
OUTX
= 1A, Load 6mH, 12Ω;
Measure 4V to 16V of V
Z
I
OUTX
= 1A, Load 6mH, 12Ω;
Measure 75% to 95% of V
Z
Negative Output Voltage
Ramp Slew Rate, Inductive
Load Switching On
SR2
V
BATT
= 12V, Load 6mH, 6Ω;
Measure 25% to 75%,
V
CC
= 5V
±2%
V
BATT
= 12V, Load 6mH, 6Ω;
Measure 25% to 75%,
T
J
= 25
o
C, V
CC
= 5V
±2%
Output Negative Voltage
Ramp Fall Time
Turn-Off Delay
Turn-On Delay
Matching Turn-On Delay
Matching Turn-Off Delay
Output Rise Time
Output Leakage Current
t
f
t
d(OFF)
t
d(ON)
∆t
d(ON)
∆t
d(OFF)
t
r
I
LK
For SR3 Postive Ramp Conditions
From 10% to 90% of V
Z
INx = High, V
OUTX
= 60V
V
OUTX
= 60V, V
CC
Open
INx = High, V
OUTX
= V
CC+
to 60V
INx = Low, V
OUTX
= 0V to 60V,
V
CC
= 0V
SUPPLY
Power Supply Current
Low V
CC
Shutdown Thresh-
old
Active Supply Range for RST
Pin
INPUTS
Low-Level Input Voltage
High-Level Input Voltage
Input Hysteresis Voltage
Reset Time after RST L→H
Input Pull-Up Resistance
Input Current
TXD PIN
(R/W = High)
Three-State Leakage Current
Logic High Output Voltage
Logic Low Output Voltage
I
LK_TXD
V
TXDH
V
TXDL
CS = High, V
TXD
= V
CC
I
OH
= -4mA, CS = Low
I
OL
= 3.2mA, CS = Low
-5
V
CC
-
0.4
-
-
-
-
5
-
0.42
-5
V
CC
-
0.4
-
-
-
-
5
-
0.42
µA
V
V
I
CC
Standby, No Load
-
3.4
3.5
7.5
3.7
-
15
4.0
5.5
-
3.4
3.5
7.5
3.7
-
15
4.0
5.5
mA
V
V
-
-
-
-
N/A
10
10
-10
-10
-
-
10
10
I
OUTX
= 2A, From 90% to 10%,
6Ω Load
I
OUTX
= 2A,
From 50% of INx to 10% of OUTx
I
OUTX
= 2A,
From 50% of INx to 90% of OUTx
-
0.5
0.75
15
25
MIN
6
TYP
70
N/A
MAX
100
MIN
6
2
5.1
0.75
HIP0084
TYP
14
9
11
1.5
MAX
24
20
20.4
3.75
UNITS
V/µs
V/µs
V/µs
V/µs
N/A
1
-
3
V/µs
-
-
N/A
25
3
-
-
-
-
-
-
15
-
-
-
-
25
10
10
±3
±3
10
µs
µs
µs
µs
µs
µs
µA
µA
µA
µA
N/A
V
CC(LOW)
(Note 9)
V
CC(RST)
(INx, CS, CLK, RST, R/W, TXD)
V
IL
V
IH
V
HYS
t
RST
R
IN
I
IH
Logic High Input Voltage
-0.3
0.7 x
V
CC
0.85
48
50
-
-
-
1.2
-
-
-
0.2 X
V
CC
V
CC
+
0.3
2.25
80
150
2
-0.3
0.7 x
V
CC
0.85
48
50
-
-
-
1.2
-
-
-
0.2 X
V
CC
V
CC
+
0.3
2.25
80
150
2
V
V
V
µs
kΩ
µA
4
HIP0082, HIP0084
Electrical Specifications
V
CC
= 5V
±10%,
T
A
= -40
o
C to 125
o
C; Unless Otherwise Specified
(Continued)
HIP0082
PARAMETER
OPEN LOAD DETECTION
Output ON Resistance in
High r
DS(ON)
Open-Load
Detection Mode
Max. Output Current in High
r
DS(ON)
Mode
Min. Output Current in Low
r
DS(ON)
Normal Mode
(Hysteresis Range)
Open-Load Fault Threshold
Open-Load Detection Pull-up
Resistance
Open-Load Delay Time
after INx H→L
Open-Load Delay Time
after INx H→L
Open Load Filter Time
r
DS(ON)1OL
Outputs 1 and 2, One Output ON,
r
DS(ON)2OL
I
OUT
= 10mA, T
J
= 150
o
C
r
DS(ON)3OL
Outputs 3 and 4, One Output ON,
r
DS(ON)4OL
I
OUT
= 10mA, T
J
= 150
o
C
I
OL(MAX)
I
O(HYS)
-
-
90
0.25 x
I
OL
(MAX)
HIP0084
MAX
MIN
TYP
MAX
UNITS
Ω
Ω
mA
NA
mA
SYMBOL
TEST CONDITIONS
MIN
TYP
-
-
-
-
6.2
5.7
180
0.95 x
I
OL
(MAX)
N/A
I
OLF
R
OL
t
DOLL
t
DOLH
t
OL
T
TMP
V
SG
t
SG
(ISC Bit is set in Fault Register)
3
2
-
-
-
-
-
20
6.5
5.2
580
252
15
60
NA
100
mA
kΩ
Td_OLx Bit = Low
Td_OLx Bit = High (Note 10)
3
340
150
3
340
150
-
-
-
5.2
580
252
ms
µs
µs
ο
C
OVER TEMPERATURE AND SHORT CIRCUIT PROTECTION
Over Temperature Detection
Threshold
Output Short-to-Gnd
Threshold
Short-to-GND Filter Time
SERIAL INTERFACE
Serial Clock Frequency
Propagation Delay CLK to
Data Valid
Setup Time, CS to CLK
CS Low to Data Valid
Hold Time CS after CLK
CS High to Output High Z
Minimum Time CLK = High
Minimum Time CLK = Low
Setup Time R/W Low to CLK
R/W Low to Output High Z
Setup Time Data Valid to
CLK Low
Setup Time R/W High to CLK
Time R/W High to Data Valid
NOTES:
8. Each Output has Over Current Shutdown protection in the positive current direction. The maximum peak current rating is set equal to the
minimum Over Current Shutdown as detailed in the Electrical Specification Table. In the event of an Over Current Shutdown the input
drive is latched OFF. The output short must be removed and the input toggled OFF and ON to restore the output drive.
9. The “Low V
CC
Shutdown” is an internal control that switches off all power drive stages when V
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Embedded System
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