HIP6601B, HIP6603B, HIP6604B
Synchronous Rectified BuckMOSFET Drivers
N O T R E C O MM E
NDED FOR NEW
DESIGNS
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DED REPL ACEM
ENT
contact our Tech
nical Support C
enter at
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DATASHEET
FN9072
Rev 9.00
December 10, 2015
The HIP6601B, HIP6603B and HIP6604B are high-
frequency, dual MOSFET drivers specifically designed to
drive two power N-Channel MOSFETs in a synchronous
rectified buck converter topology. These drivers combined
with a HIP63xx or the ISL65xx series of Multi-Phase Buck
PWM controllers and MOSFETs form a complete core-
voltage regulator solution for advanced microprocessors.
The HIP6601B drives the lower gate in a synchronous
rectifier to 12V, while the upper gate can be independently
driven over a range from 5V to 12V. The HIP6603B drives
both upper and lower gates over a range of 5V to 12V. This
drive-voltage flexibility provides the advantage of optimizing
applications involving trade-offs between switching losses
and conduction losses. The HIP6604B can be configured as
either a HIP6601B or a HIP6603B.
The output drivers in the HIP6601B, HIP6603B and
HIP6604B have the capacity to efficiently switch power
MOSFETs at frequencies up to 2MHz. Each driver is
capable of driving a 3000pF load with a 30ns propagation
delay and 50ns transition time. These products implement
bootstrapping on the upper gate with only an external
capacitor required. This reduces implementation complexity
and allows the use of higher performance, cost effective,
N-Channel MOSFETs. Adaptive shoot-through protection is
integrated to prevent both MOSFETs from conducting
simultaneously.
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• Internal Bootstrap Device
• Supports High Switching Frequency
- Fast Output Rise Time
- Propagation Delay 30ns
• Small 8 Ld SOIC and EPSOIC and 16 Ld QFN Packages
• Dual Gate-Drive Voltages for Optimal Efficiency
• Three-State Input for Output Stage Shutdown
• Supply Undervoltage Protection
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN—Quad Flat
No Leads—Product Outline.
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile.
• Pb-Free (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel Pentium® III, AMD®
Athlon™ Microprocessors
• High Frequency Low Profile DC/DC Converters
• High Current Low Voltage DC/DC Converters
Related Literature
• Technical Brief
TB363,
Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
FN9072 Rev 9.00
December 10, 2015
Page 1 of 14
HIP6601B, HIP6603B, HIP6604B
Ordering Information
PART NUMBER
(Notes 1, 2)
HIP6601BCBZ*
HIP6601BCBZA*
HIP6601BECBZ*
(No longer
available or
supported)
PART
MARKING
6601
BCBZ
6601
BCBZ
6601
BECBZ
TEMP.
RANGE
(°C)
0 to +85
0 to +85
0 to +85
PACKAGE
PKG.
(Pb-free) DWG. #
8 Ld SOIC
8 Ld SOIC
8 Ld
EPSOIC
M8.15
M8.15
M8.15B
Pinouts
HIP6601BCB, HIP6603BCB,
HIP6601BECB, HIP6603BECB,
(8 LD SOIC, EPSOIC)
TOP VIEW
UGATE
BOOT
PWM
GND
1
2
3
4
8
7
6
5
PHASE
PVCC
VCC
LGATE
NC
HIP6603BECBZ*
(No longer
available or
supported)
HIP6604BCRZ*
(No longer
available or
supported)
6603
BECBZ
0 to +85
8 Ld
EPSOIC
M8.15B
NC 1
BOOT 2
16
15
14
66
04BCRZ
0 to +85
16 Ld QFN
L16.4x4
PWM 3
GND 4
ER
NG
LO
O
5
N
E
BL
A
IL
VA
A
R
O
SU
NC
13
ED
RT
O
PP
12 NC
HIP6603BCBZ*
6603
BCBZ
0 to +85
8 Ld SOIC
M8.15
PHASE
UGATE
HIP6601BECBZA*
6601
BECBZ
(No longer
available or
supported)
0 to +85
8 Ld
EPSOIC
M8.15B
HIP6604B
(16 LD QFN)
TOP VIEW
11 PVCC
10 LVCC
9
VCC
PGND
NOTES:
1. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet
or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. For Moisture Sensitivity Level (MSL), please see device
information page for
HIP6601B, HIP6603B, HIP6604B.
For
more information on MSL, please see Technical Brief
TB363.
FN9072 Rev 9.00
December 10, 2015
LGATE
*Add “-T” suffix for tape and reel. Please refer to
TB347
for details
on reel specifications.
6
NC
7
8
NC
Page 2 of 14
HIP6601B, HIP6603B, HIP6604B
Block Diagrams
HIP6601B AND HIP6603B
PVCC
VCC
+5V
10k
PWM
10k
CONTROL
LOGIC
SHOOT-
THROUGH
PROTECTION
BOOT
UGATE
PHASE
†
VCC FOR HIP6601B
PVCC FOR HIP6603B
†
LGATE
GND
PAD
FOR HIP6601BECB AND HIP6603BECB DEVICES, THE PAD ON THE BOTTOM
SIDE OF THE PACKAGE MUST BE SOLDERED TO THE PC BOARD.
HIP6604B QFN PACKAGE
PVCC
VCC
+5V
10k
PWM
CONTROL
LOGIC
10k
GND
PAD
SHOOT-
THROUGH
PROTECTION
PHASE
LVCC
LGATE
PGND
PAD ON THE BOTTOM SIDE OF THE PACKAGE MUST BE SOLDERED TO THE PC BOARD
CONNECT LVCC TO VCC FOR HIP6601B CONFIGURATION
CONNECT LVCC TO PVCC FOR HIP6603B CONFIGURATION.
BOOT
UGATE
FN9072 Rev 9.00
December 10, 2015
Page 3 of 14
HIP6601B, HIP6603B, HIP6604B
Typical Application: 3-Channel Converter Using HIP6301 and HIP6601B Gate Drivers
+12V
+5V
BOOT
VCC
PWM
PVCC
UGATE
PHASE
DRIVE
HIP6601B
LGATE
+12V
+5V
+5V
BOOT
+V
CORE
VFB
VCC
VSEN
PGOOD
COMP
VCC
PWM1
PWM2
PWM3
PWM
PVCC
UGATE
PHASE
DRIVE
HIP6601B
LGATE
VID
MAIN
CONTROL
HIP6301
ISEN1
ISEN2
FS
GND
ISEN3
+5V
BOOT
PVCC
VCC
PWM
DRIVE
HIP6601B
PHASE
LGATE
UGATE
+12V
FN9072 Rev 9.00
December 10, 2015
Page 4 of 14
HIP6601B, HIP6603B, HIP6604B
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (V
BOOT
- V
PHASE
) . . . . . . . . . . . . . . . . . . . . . . .15V
Input Voltage (V
PWM
) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
UGATE. . . . . . .V
PHASE
- 5V(<400ns pulse width) to V
BOOT
+ 0.3V
. . . . . . . . . . . .V
PHASE
-0.3V(>400ns pulse width) to V
BOOT
+ 0.3V
LGATE . . . . . . . . . GND - 5V(<400ns pulse width) to V
PVCC
+ 0.3V
. . . . . . . . . . . . . . GND -0.3V(>400ns pulse width) to V
PVCC
+ 0.3V
PHASE. . . . . . . . . . . . . . . . . . GND -5V(<400ns pulse width) to 15V
. . . . . . . . . . . . . . . . . . . . . . .GND -0.3V(>400ns pulse width) to 15V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . .200V
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
SOIC Package (Note 3) . . . . . . . . . . . .
97
N/A
EPSOIC Package (Note 4). . . . . . . . . .
38
N/A
QFN Package (Notes 4, 5). . . . . . . . . .
48
10
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
For Recommended soldering conditions see Tech Brief
TB389.
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0°C to 85°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . 125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . . . . . . 5V to 12V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
3.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Boldface limits apply over the operating
temperature range, 0°C to +85°C
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
PARAMETER
VCC SUPPLY CURRENT
Bias Supply Current
I
VCC
HIP6601B, f
PWM
= 1MHz, V
PVCC
= 12V
HIP6603B, f
PWM
= 1MHz, V
PVCC
= 12V
-
-
-
-
4.4
2.5
200
1.8
6.2
3.6
430
3.3
mA
mA
A
mA
Upper Gate Bias Current
I
PVCC
HIP6601B, f
PWM
= 1MHz, V
PVCC
= 12V
HIP6603B, f
PWM
= 1MHz, V
PVCC
= 12V
POWER-ON RESET
VCC Rising Threshold
VCC Falling Threshold
PWM INPUT
Input Current
PWM Rising Threshold
PWM Falling Threshold
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-Off Propagation Delay
LGATE Turn-Off Propagation Delay
Shutdown Window
Shutdown Holdoff Time
t
RUGATE
t
RLGATE
t
FUGATE
t
FLGATE
t
PDLUGATE
t
PDLLGATE
V
PVCC
= 12V, 3nF Load
V
PVCC
= 12V, 3nF Load
V
PVCC
= 12V, 3nF Load
V
PVCC
= 12V, 3nF Load
V
PVCC
= 12V, 3nF Load
V
PVCC
= 12V, 3nF Load
I
PWM
V
PWM
= 0V or 5V (See “Block Diagrams” on
page 3)
-
-
-
-
-
-
-
-
-
1.4
-
500
3.6
1.45
20
50
20
20
30
20
-
230
-
-
-
-
-
-
-
-
-
3.6
-
A
V
V
ns
ns
ns
ns
ns
ns
V
ns
9.7
7.3
9.95
7.6
10.4
8.0
V
V
FN9072 Rev 9.00
December 10, 2015
Page 5 of 14
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