The AD8170(2:1) and AD8174(4:1) are very high speed
buffered multiplexers. These multiplexers offer an internal
current feedback output amplifier whose gain can be pro-
grammed via external resistors and is capable of delivering 50
mA of output current. They offer –3 dB signal bandwidth of
250 MHz and slew rate of greater than 1000 V/µs. Additionally,
the AD8170 and AD8174 have excellent video specifications
with low differential gain and differential phase error of 0.02%
and 0.05° and 0.1 dB flatness out to 80 MHz. With a low 78
dB of crosstalk and better than 88 dB isolation, these devices are
useful in many high speed applications. These are low power
devices consuming only 9.7 mA from a
±
5 V supply.
The AD8174 offers a high speed disable feature allowing the
output to be put into a high impedance state for cascading
stages so that the off channels do not load the output bus.
Additionally, the AD8174 can be shut down (SD) when not in
use to minimize power consumption (I
S
= 1.5 mA). These
products will be offered in 8-lead and 14-lead PDIP and SOIC
packages.
0
V
IN
= 50mV rms
G = +2
R
F
= 499Ω (AD8170R)
–1
AD8170/AD8174–SPECIFICATIONS
Parameter
SWITCHING CHARACTERISTICS
Switching Time
1
50% Logic to 10% Output Settling
50% Logic to 90% Output Settling
50% Logic to 99.9% Output Settling
ENABLE
to Channel ON Time
2
(AD8174R)
50% Logic to 90% Output Settling
ENABLE
to Channel OFF Time
2
(AD8174R)
50% Logic to 90% Output Settling
Shutdown to Channel ON Time
3
(AD8174R)
50% Logic to 90% Output Settling
Shutdown to Channel OFF Time
3
(AD8174R)
50% Logic to 90% Output Settling
Channel Switching Transient (Glitch)
4
DIGITAL INPUTS
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Input Current
Logic “0” Input Current
DYNAMIC PERFORMANCE
–3 dB Bandwidth (Small Signal)
5
–3 dB Bandwidth (Large Signal)
5
0.1 dB Bandwidth
5
Rise and Fall Time (10% to 90%)
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Differential Gain
Differential Phase
All Hostile Crosstalk
6
AD8170R
All Hostile Crosstalk
6
Disable Isolation
7
Shutdown Isolation
8
Input Voltage Noise
+Input Current Noise
–Input Current Noise
Total Harmonic Distortion
DC/TRANSFER CHARACTERISTICS
Transresistance
Open-Loop Voltage Gain
Gain Accuracy
9
Gain Matching
Input Offset Voltage
Input Offset Voltage Matching
Input Offset Voltage Drift
Input Bias Current
AD8174R
AD8174R
AD8174R
Conditions
(@ T
A
= +25 C, V
S
= 5 V, R
L
= 150
,
G = +2, R
F
= 499
(AD8170R), R
F
= 549 (AD8174R) unless otherwise noted)
AD8170A/AD8174A
Min
Typ
Max
Units
Channel-to-Channel
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
IN0, IN2 = +0.5 V; IN1, IN3 = –0.5 V
All Inputs Grounded
SELECT, A0, A1,
ENABLE,
SD Inputs, T
MIN
–T
MAX
SELECT, A0, A1,
ENABLE,
SD Inputs, T
MIN
–T
MAX
SELECT, A0, A1 Inputs, T
MIN
–T
MAX
ENABLE,
SD Inputs, T
MIN
–T
MAX
SELECT, A0, A1 Inputs, T
MIN
–T
MAX
ENABLE,
SD Inputs, T
MIN
–T
MAX
V
O
= 50 mV rms, R
L
= 100
Ω
V
O
= 1 V rms, R
L
= 100
Ω
V
O
= 50 mV rms, R
F
= 499
Ω
(AD8170R), R
L
= 100
Ω
V
O
= 50 mV rms, R
F
= 549
Ω
(AD8174R), R
L
= 100
Ω
2 V Step
2 V Step
2 V Step
ƒ = 3.58 MHz
ƒ = 3.58 MHz
ƒ = 5 MHz, R
L
= 100
Ω
ƒ = 30 MHz, R
L
= 100
Ω
ƒ = 5 MHz, R
L
= 100
Ω
ƒ = 30 MHz, R
L
= 100
Ω
ƒ = 5 MHz, R
L
= 100
Ω
ƒ = 30 MHz, R
L
= 100
Ω
ƒ = 5 MHz, R
L
= 100
Ω
ƒ = 30 MHz, R
L
= 100
Ω
ƒ = 10 kHz to 30 MHz
ƒ = 10 kHz to 30 MHz
ƒ = 10 kHz to 30 MHz
ƒ
C
= 10 MHz, V
O
= 2 V p-p, R
L
= 150
Ω
ƒ
C
= 10 MHz, V
O
= 2 V p-p, R
L
= 1 kΩ
400
2000
G = +1, R
F
= 1 kΩ
Channel-to-Channel
T
MIN
to T
MAX
Channel-to-Channel
(+) Switch Input
T
MIN
to T
MAX
(–) Buffer Input
T
MIN
to T
MAX
(+) Switch and (–) Buffer Input
2.0
7.5
9.1
25
17
120
20
115
138 /104
ns
ns
ns
ns
ns
ns
ns
mV p-p
V
V
nA
µA
µA
nA
MHz
MHz
MHz
ns
V/µs
ns
%
Degrees
dB
dB
dB
dB
dB
dB
dB
dB
nV/√Hz
pA/√Hz
pA/√Hz
dBc
dBc
kΩ
V/V
%
%
mV
mV
mV
µV/°C
µA
µA
µA
µA
nA/°C
50
1
3
30
250
100
85
1.6
1000
15
0.02
0.05
–80
–65
–78
–63
–88
–72
–92
–77
10
1.6
8.5
–60
–72
600
6000
0.4
0.05
5
1.5
11
7
3
20
0.8
300
5
5
300
9
12
5
15
15
10
14
Input Bias Current Drift
–2–
REV. 0
AD8170/AD8174
Parameter
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Voltage Range
Input Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Short Circuit Current
Output Resistance
Output Capacitance
POWER SUPPLY
Operating Range
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Quiescent Current
Conditions
(+) Switch Input
(–) Buffer Input
Channel Enabled (R Package)
Channel Disabled (R Package)
+CMRR,
∆V
CM
= 1 V
–CMRR,
∆V
CM
= 1 V
R
L
= 1 kΩ, T
MIN
–T
MAX
R
L
= 150
Ω,
T
MIN
–T
MAX
R
L
= 10
Ω
Enabled
Disabled (AD8174)
Disabled (AD8174)
±
4
58
55
52
50
51
50
±
4.0
±
3.5
AD8170A/AD8174A
Min
Typ
Max
1.7
100
1.1
1.1
±
3.3
56
52
±
4.26
±
4.0
50
180
10
10
7.5
±
6
66
58
8.7/9.7
4.1
1.5
–40
11/13
5
2.5
+85
Units
MΩ
Ω
pF
pF
V
dB
dB
V
V
mA
mA
mΩ
MΩ
pF
V
dB
dB
dB
dB
mA
mA
mA
°C
+PSRR
–PSRR
+V
S
= +4.5 V to +5.5 V, –V
S
= –5 V
T
MIN
–T
MAX
–V
S
= –4.5 V to –5.5 V, +V
S
= +5 V
T
MIN
–T
MAX
All Channels “ON”, T
MIN
–T
MAX
AD8174 Disabled, T
MIN
–T
MAX
AD8174 Shutdown, T
MIN
–T
MAX
OPERATING TEMPERATURE RANGE
NOTES
1
Shutdown (SD) and
ENABLE
pins are grounded (AD8174). IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc. SELECT (A0 or A1 for AD8174) input is
driven with 0 V to +5 V pulse. Measure transition time from 50% of SELECT (A0 or A1) input value (+2.5 V) and 10% (or 90%) of the total output voltage transi-
tion from IN0 (or IN2) channel voltage (+0.5 V) to IN1 (or IN3 = –0.5 V) or vice versa.
2
AD8174 only. Shutdown (SD) pin is grounded.
ENABLE
pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 0 and A1 = Logic 1, then IN2 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and mea-
sure transition time from 50% of
ENABLE
pulse (+2.5 V) to 90% of the total output voltage change. In Figure 5,
∆t
OFF
is the disable time,
∆t
ON
is the enable time.
3
AD8174 only.
ENABLE
pin is grounded. Shutdown (SD) pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 1 and A1 = Logic O, then IN1 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and mea-
sure transition time from 50% of SD pulse (+2.5 V) to 90% of the total output voltage change. In Fig ure 6,
∆t
OFF
is the shutdown assert time,
∆t
ON
is the shutdown
release time.
4
All inputs are grounded. SELECT (A0 or A1 for AD8174) input is driven with 0 V to +5 V pulse. The outputs are monitored. Speeding the edges of the SELECT
(A0 or A1) pulse increases the glitch magnitude due to coupling via the ground plane.
5
Bandwidth of the multiplexer is dependent upon the resistor feedback network. Refer to Table III for recommended feedback component values, which give the best
compromise between a wide and a flat frequency response.
6
Select input(s) that is (are) not being driven (i.e., if SELECT is Logic 1, activated input is IN1; in AD8174, if A0 = Logic 0, A1 = Logic 1, activated input is IN2).
Drive all other inputs with V
IN
= 0.707 V rms, and monitor output at f = 5 MHz and 30 MHz; R
L
= 100
Ω
(see Figure 13).
7
AD8174 only. Shutdown (SD) pin is grounded. Mux is disabled, (i.e.,
ENABLE
= Logic 1) and all inputs are driven simultaneously with V
IN
= 0.354 V rms. Out-
put is monitored at f = 5 MHz and 30 MHz; R
L
= 100
Ω.
In this mode, the output impedance of the disabled mux is very high (typ 10 M
Ω),
and the signal couples
across the package; the load impedance and the feedback network determine the crosstalk. For instance, in a closed-loop gain of +1, r
OUT
10 MΩ, in a gain of +2
(R
F
= R
G
= 549
Ω),
r
OUT
= 1.1 kΩ (see Figure 14).
8
AD8174 only.
ENABLE
pin is grounded. Mux is shutdown (i.e., SD = Logic 1), and all inputs are driven simultaneously with V
IN
= 0.354 V rms. Output is moni-
tored at f = 5 MHz and 30 MHz; R
L
= 100
Ω.
(see Figure 14). The mux output impedance in shutdown mode is the same as the disabled mux output impedance.
9
For Gain Accuracy expression, refer to Equation 4.
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