Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33887
Rev 9.0, 10/2004
5.0 A H-Bridge with Load Current
Feedback
The 33887 is a monolithic H-Bridge Power IC with a load current feedback
feature making it ideal for closed-loop DC motor control. The IC incorporates
internal control logic, charge pump, gate drive, and low R
DS(ON)
MOSFET
output circuitry. The 33887 is able to control inductive loads with continuous
DC load currents up to 5.0 A, and with peak current active limiting between
5.2 A and 7.8 A. Output loads can be pulse width modulated (PWM-ed) at
frequencies up to 10 kHz. The load current feedback feature provides a
proportional (1/375th of the load current) constant-current output suitable for
monitoring by a microcontroller’s A/D input. This feature facilitates the design
of closed-loop torque/speed control as well as open load detection.
A Fault Status output terminal reports undervoltage, short circuit, and
overtemperature conditions. Two independent inputs provide polarity control
of two half-bridge totem-pole outputs. Two disable inputs force the H-Bridge
outputs to tri-state (exhibit high impedance).
The 33887 is parametrically specified over a temperature range of
-40°C
≤
T
A
≤
125°C and a voltage range of 5.0 V
≤
V+
≤
28 V. The IC can also
be operated up to 40 V with derating of the specifications.
Features
• 5.0 V to 40 V Continuous Operation
• 120 mΩ R
DS(ON)
H-Bridge MOSFETs
• TTL/CMOS Compatible Inputs
• PWM Frequencies up to 10 kHz
• Active Current Limiting (Regulation) via Internal Constant OFF-Time
PWM (with Temperature-Dependent Threshold Reduction)
• Output Short Circuit Protection (Short to V+ or Short to GND)
• Undervoltage Shutdown
• Fault Status Reporting
• Sleep Mode with Current Draw
≤50 µA
(Inputs Floating or Set to Match
Default Logic States)
• Pb-Free Packaging Designated by Suffix Codes VW and PNB
33887
5.0 A H-BRIDGE WITH LOAD
CURRENT FEEDBACK
Freescale Semiconductor, Inc...
DH SUFFIX
VW (Pb-FREE) SUFFIX
CASE 979-04
20-TERMINAL HSOP
PNB (Pb-FREE) SUFFIX
CASE 1503-01
36-TERMINAL PQFN
Bottom View
DWB SUFFIX
CASE 1390-01
54-TERMINAL SOICW-EP
ORDERING INFORMATION
Device
MC33887DH/R2
PC33887VW/R2
MC33887PNB/R2
MC33887DWB/R2
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
Temperature
Range (T
A
)
Package
20 HSOP
36 PQFN
54 SOICW-EP
33887 Simplified Application Diagram
Simplified Application Diagram
33887 Simplified Application Diagram
5.0 V
CCP
33887
33887
V+
OUT1
V+
IN
OUT
OUT
OUT
OUT
OUT
A/D
FS
EN
IN1
IN2
D1
D2
FB
MOTOR
OUT2
PGND
AGND
MCU
© Motorola, Inc. 2004
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Freescale Semiconductor, Inc.
Ccp
C
CP
Charge
Pump
Charge
Pump
VPWR
V+
EN
5.0
V
5.0
V
Regulator
Regulator
80 uA
80
µA
(each)
(each)
Freescale Semiconductor, Inc...
Low-Side
Current Limit,
Current Limit,
Ov ercurrent
Short Circuit
Sens e, &
Sense, and
Feedback
Current Feedback
Circuit
Circuit
IN1
IN2
D1
D2
25
uA
25
µA
Control
Control
Logic
OUT1
Gate Drive
Gate Drive
OUT2
Logic
Over-
Over
Overtemperature
Detection
temperature
Temperature
Undervoltage
Undervoltage
Protection
FS
FB
AGND
PGND
Figure 1. 33887 Simplified Internal Block Diagram
33887
2
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Freescale Semiconductor, Inc.
Tab
AGND
FS
IN1
V+
V+
OUT1
OUT1
FB
PGND
PGND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
EN
IN2
D1
C
CP
V+
OUT2
OUT2
D2
PGND
PGND
Tab
Freescale Semiconductor, Inc...
HSOP TERMINAL DEFINITIONS
A functional description of each terminal can be found in the System/Application Information section,
page 19.
Terminal
1
2
3
4, 5, 16
6, 7
8
9–12
13
14, 15
17
18
19
20
Tab/Pad
Terminal
Name
AGND
FS
IN1
V+
OUT1
FB
PGND
D2
OUT2
C
CP
D1
IN2
EN
Thermal
Interface
Formal Name
Analog Ground
Fault Status for H-Bridge
Logic Input Control 1
Positive Power Supply
H-Bridge Output 1
Feedback for H-Bridge
Power Ground
Disable 2
H-Bridge Output 2
Charge Pump Capacitor
Disable 1
Logic Input Control 2
Enable
Exposed Pad Thermal
Interface
Low-current analog signal ground.
Open drain active LOW Fault Status output requiring a pullup resistor to 5.0 V.
Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
Positive supply connections
Output 1 of H-Bridge.
Current sensing feedback output providing ground referenced 1/375th (0.00266)
of H-Bridge high-side current.
High-current power ground.
Active LOW input used to simultaneously tri-state disable both H-Bridge outputs.
When D2 is Logic LOW, both outputs are tri-stated.
Output 2 of H-Bridge.
External reservoir capacitor connection for internal charge pump capacitor.
Active HIGH input used to simultaneously tri-state disable both H-Bridge outputs.
When D1 is Logic HIGH, both outputs are tri-stated.
Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
Logic input Enable control of device (i.e., EN logic HIGH = full operation, EN logic
LOW = Sleep Mode).
Exposed pad thermal interface for sinking heat from the device.
Note
Must be DC-coupled to analog ground and power ground via very low
impedance path to prevent injection of spurious signals into IC substrate.
Definition
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
33887
3
Freescale Semiconductor, Inc.
Transparent Top View of Package
36
35
34
33
32
31
30
29
C
CP
V+
V+
OUT2
OUT2
NC
OUT2
OUT2
NC
D1
IN2
EN
V+
V+
NC
AGND
FS
NC
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
11
28
27
26
25
24
23
22
21
20
19
NC
D2
PGND
PGND
PGND
PGND
PGND
PGND
FB
NC
Freescale Semiconductor, Inc...
PQFN TERMINAL DEFINITIONS
A functional description of each terminal can be found in the System/Application Information section,
page 19.
Terminal
1, 7, 10, 16,
19, 28, 31
2
3
4
5, 6, 12, 13, 34, 35
8
9
11
14, 15, 17, 18
20
21–26
27
29, 30, 32, 33
36
Pad
Terminal
Name
NC
D1
IN2
EN
V+
AGND
FS
IN1
OUT1
FB
PGND
D2
OUT2
C
CP
Thermal
Interface
Formal Name
No Connect
Disable 1
Logic Input Control 2
Enable
Positive Power Supply
Analog Ground
Fault Status for H-Bridge
Logic Input Control 1
H-Bridge Output 1
Feedback for H-Bridge
Power Ground
Disable 2
H-Bridge Output 2
Charge Pump Capacitor
Exposed Pad Thermal
Interface
Definition
No internal connection to this terminal.
Active HIGH input used to simultaneously tri-state disable both H-Bridge
outputs. When D1 is Logic HIGH, both outputs are tri-stated.
Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
Logic input Enable control of device (i.e., EN logic HIGH = full operation,
EN logic LOW = Sleep Mode).
Positive supply connections.
Low-current analog signal ground.
Open drain active LOW Fault Status output requiring a pullup resistor to
5.0 V.
Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
Output 1 of H-Bridge.
Current feedback output providing ground referenced 1/375th ratio of
H-Bridge high-side current.
High-current power ground.
Active LOW input used to simultaneously tri-state disable both H-Bridge
outputs. When D2 is Logic LOW, both outputs are tri-stated.
Output 2 of H-Bridge.
External reservoir capacitor connection for internal charge pump capacitor.
Exposed pad thermal interface for sinking heat from the device.
Note
Must be DC-coupled to analog ground and power ground via very low
impedance path to prevent injection of spurious signals into IC substrate.
33887
4
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IN1
V+
V+
OUT1
OUT1
NC
OUT1
OUT1
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Freescale Semiconductor, Inc.
Transparent Top View of Package
Freescale Semiconductor, Inc...
PGND
PGND
PGND
PGND
NC
NC
NC
D2
NC
OUT2
OUT2
OUT2
OUT2
NC
V+
V+
V+
V+
NC
NC
NC
NC
C
CP
D1
IN2
EN
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
.35
34
33
32
31
30
29
28
PGND
PGND
PGND
PGND
NC
NC
NC
FB
NC
OUT1
OUT1
OUT1
OUT1
NC
V+
V+
V+
V+
NC
NC
NC
NC
IN1
FS
AGND
NC
NC
SOICW-EP TERMINAL DEFINITIONS
A functional description of each terminal can be found in the System/Application Information section,
page 19.
Terminal
1–4, 51–54
5–7, 9, 14, 19–22,
27– 29, 33–36, 41,
46, 48–50
8
10–13
15 –18, 37–40
23
24
25
26
30
31
32
42–45
47
Pad
Terminal
Name
PGND
NC
Formal Name
Power Ground
No Connect
High-current power ground.
No internal connection to this terminal.
Definition
D2
OUT2
V+
C
CP
D1
IN2
EN
AGND
FS
IN1
OUT1
FB
Thermal
Interface
Disable 2
H-Bridge Output 2
Positive Power Supply
Charge Pump Capacitor
Disable 1
Logic Input Control 2
Enable
Analog Ground
Fault Status for H-Bridge
Logic Input Control 1
H-Bridge Output 1
Feedback for H-Bridge
Exposed Pad Thermal
Interface
Active LOW input used to simultaneously tri-state disable both H-Bridge
outputs. When D2 is Logic LOW, both outputs are tri-stated.
Output 2 of H-Bridge.
Positive supply connections.
External reservoir capacitor connection for internal charge pump capacitor.
Active HIGH input used to simultaneously tri-state disable both H-Bridge
outputs. When D1 is Logic HIGH, both outputs are tri-stated.
Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
Logic input Enable control of device (i.e., EN logic HIGH = full operation,
EN logic LOW = Sleep Mode).
Low-current analog signal ground.
Open drain active LOW Fault Status output requiring a pullup resistor to
5.0 V.
Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
Output 1 of H-Bridge.
Current feedback output providing ground referenced 1/375th ratio of
H-Bridge high-side current.
Exposed pad thermal interface for sinking heat from the device.
Note
Must be DC-coupled to analog ground and power ground via very low
impedance path to prevent injection of spurious signals into IC substrate.
33887
5
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
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