IC,LATCH,SINGLE,9-BIT,FCT/PCT-CMOS,DIP,24PIN,CERAMIC
| Parameter Name | Attribute value |
| package instruction | DIP, DIP24,.3 |
| Reach Compliance Code | unknown |
| JESD-30 code | R-XDIP-T24 |
| Logic integrated circuit type | D LATCH |
| MaximumI(ol) | 0.032 A |
| Number of digits | 9 |
| Number of functions | 1 |
| Number of terminals | 24 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Output characteristics | 3-STATE |
| Package body material | CERAMIC |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP24,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| method of packing | TAPE AND REEL |
| power supply | 5 V |
| Certification status | Not Qualified |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Base Number Matches | 1 |
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