5962-8995001S2A datasheet, PDF

5962-8995001S2A: DescriptionACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20; Categorylogic logic; File Size348KB，8 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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5962-8995001S2A Overview

ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	QCCN, LCC20,.35SQ
Reach Compliance Code	unknown
series	ACT
JESD-30 code	S-CQCC-N20
JESD-609 code	e0
length	8.89 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-K FLIP-FLOP
Maximum Frequency@Nom-Sup	80000000 Hz
MaximumI(ol)	0.024 A
Number of digits	2
Number of functions	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC20,.35SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
propagation delay (tpd)	14 ns
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class S
Maximum seat height	1.905 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb) - hot dipped
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	NEGATIVE EDGE
width	8.89 mm
minfmax	80 MHz
Base Number Matches	1

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