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542MILFT

Description
SOIC-8, Reel
Categorylogic    logic   
File Size215KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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542MILFT Overview

SOIC-8, Reel

542MILFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Manufacturer packaging codeDCG8
Reach Compliance Codecompliant
ECCN codeEAR99
series542
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
MaximumI(ol)0.025 A
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times2
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup15 ns
propagation delay (tpd)15 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.5 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
Base Number Matches1
DATASHEET
CLOCK DIVIDER
Description
The ICS542 is cost effective way to produce a high-quality
clock output divided from a clock input. The chip accepts a
clock input up to 156 MHz at 3.3 V and produces a divide by
2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs
on the chip, one being a low-skew divide by two of the other.
For instance, if an 100 MHz input clock is used, the ICS542
can produce low-skew 50 MHz and 25 MHz clocks, or low
skew 25 MHz and 12.5 MHz clocks. The chip has an
all-chip power-down mode that stops the outputs low, and
an OE pin that tri-states the outputs.
See the ICS541 and ICS543 for other clock dividers, and
the ICS501, 502, 511, 512, and 525 for clock multipliers.
ICS542
Features
8-pin SOIC package, Pb free
Available in RoHS compliant package
IDT’s lowest cost clock divider
Low skew (500 ps) outputs. One is /2 of the other
Easy to use with other generators and buffers
Input clock frequency up to 156 MHz
Output clock duty cycle of 45/55
Power-down turns off chip
Output Enable
Advanced, low-power CMOS process
Operating voltage of 3.3 V or 5 V
Does not degrade phase noise - no PLL
Available in industrial and commercial temperature
ranges
Block Diagram
VDD
CLK1
S1, S0
Divider
and
Selection
Circuitry
/2
CLK2
Input Clock
GND
OE (both outputs)
IDT™ / ICS™
CLOCK DIVIDER
1
ICS542
REV J 051310

542MILFT Related Products

542MILFT 542MLFT
Description SOIC-8, Reel SOIC-8, Reel
Brand Name Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Parts packaging code SOIC SOIC
package instruction SOP, SOP8,.25 SOP, SOP8,.25
Contacts 8 8
Manufacturer packaging code DCG8 DCG8
Reach Compliance Code compliant compli
ECCN code EAR99 EAR99
series 542 542
Input adjustment STANDARD STANDARD
JESD-30 code R-PDSO-G8 R-PDSO-G8
JESD-609 code e3 e3
length 4.9 mm 4.9 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
MaximumI(ol) 0.025 A 0.025 A
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 8 8
Actual output times 2 2
Maximum operating temperature 85 °C 70 °C
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Encapsulate equivalent code SOP8,.25 SOP8,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
propagation delay (tpd) 15 ns 15 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.5 ns 0.5 ns
Maximum seat height 1.75 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 3.9 mm 3.9 mm
Base Number Matches 1 1
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